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author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2022-05-07 14:14:13 +0200 |
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committer | Mark Brown <broonie@kernel.org> | 2022-05-11 18:42:49 +0200 |
commit | 292709b9cf3ba470af94b62c9bb60284cc581b79 (patch) | |
tree | f5b5865fc87e9658f388a0954143922b436438d8 /sound | |
parent | ASoC: SOF: ipc3-topology: Correct get_control_data for non bytes payload (diff) | |
download | linux-292709b9cf3ba470af94b62c9bb60284cc581b79.tar.xz linux-292709b9cf3ba470af94b62c9bb60284cc581b79.zip |
ASoC: fsl_micfil: explicitly clear software reset bit
SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined as
non volatile register, it still remain in regmap cache after set,
then every update of REG_MICFIL_CTRL1, software reset happens.
to avoid this, clear it explicitly.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1651925654-32060-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
-rw-r--r-- | sound/soc/fsl/fsl_micfil.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c index 9f90989ac59a..cb84d95c3aac 100644 --- a/sound/soc/fsl/fsl_micfil.c +++ b/sound/soc/fsl/fsl_micfil.c @@ -191,6 +191,17 @@ static int fsl_micfil_reset(struct device *dev) return ret; } + /* + * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined + * as non-volatile register, so SRES still remain in regmap + * cache after set, that every update of REG_MICFIL_CTRL1, + * software reset happens. so clear it explicitly. + */ + ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, + MICFIL_CTRL1_SRES); + if (ret) + return ret; + return 0; } |