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authorDan Williams <dan.j.williams@intel.com>2023-02-15 01:06:10 +0100
committerDan Williams <dan.j.williams@intel.com>2023-02-15 01:06:10 +0100
commita5fcd228ca1db9810ba1ed461c90b6ee933b9daf (patch)
tree814f208a81af8e90bff8619e2eed5d167b400dd2 /tools/testing/cxl/Kbuild
parentMerge branch 'for-6.3/cxl' into cxl/next (diff)
parentcxl/pci: Remove locked check for dvsec_range_allowed() (diff)
downloadlinux-a5fcd228ca1db9810ba1ed461c90b6ee933b9daf.tar.xz
linux-a5fcd228ca1db9810ba1ed461c90b6ee933b9daf.zip
Merge branch 'for-6.3/cxl-rr-emu' into cxl/next
Pick up the CXL DVSEC range register emulation for v6.3, and resolve conflicts with the cxl_port_probe() split (from for-6.3/cxl-ram-region) and event handling (from for-6.3/cxl-events).
Diffstat (limited to 'tools/testing/cxl/Kbuild')
-rw-r--r--tools/testing/cxl/Kbuild1
1 files changed, 1 insertions, 0 deletions
diff --git a/tools/testing/cxl/Kbuild b/tools/testing/cxl/Kbuild
index 37f77ac9b917..fba7bec96acd 100644
--- a/tools/testing/cxl/Kbuild
+++ b/tools/testing/cxl/Kbuild
@@ -10,6 +10,7 @@ ldflags-y += --wrap=devm_cxl_add_passthrough_decoder
ldflags-y += --wrap=devm_cxl_enumerate_decoders
ldflags-y += --wrap=cxl_await_media_ready
ldflags-y += --wrap=cxl_hdm_decode_init
+ldflags-y += --wrap=cxl_dvsec_rr_decode
ldflags-y += --wrap=cxl_rcrb_to_component
DRIVERS := ../../../drivers