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author | Johan Hovold <johan+linaro@kernel.org> | 2024-09-02 09:08:30 +0200 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2024-09-03 22:01:34 +0200 |
commit | 71c03a8cb213d267853e0d9f520c972480960544 (patch) | |
tree | 1970f1e15144139936a77c6ec0b918c58221bebf /tools/testing/selftests/net/lib.sh | |
parent | clk: starfive: jh7110-sys: Add notifier for PLL0 clock (diff) | |
download | linux-71c03a8cb213d267853e0d9f520c972480960544.tar.xz linux-71c03a8cb213d267853e0d9f520c972480960544.zip |
clk: qcom: gcc-sc8280xp: don't use parking clk_ops for QUPs
A recent change started parking the RCG at an always on parent during
registration, something which specifically breaks handover from an early
serial console.
Quoting Stephen Boyd who fixed this issue for SM8550 [1]:
The QUPs aren't shared in a way that requires parking the RCG at
an always on parent in case some other entity turns on the clk.
The hardware is capable of setting a new frequency itself with
the DFS mode, so parking is unnecessary. Furthermore, there
aren't any GDSCs for these devices, so there isn't a possibility
of the GDSC turning on the clks for housekeeping purposes.
This wasn't a problem to mark these clks shared until we started
parking shared RCGs at clk registration time in commit
01a0a6cc8cfd ("clk: qcom: Park shared RCGs upon registration").
Parking at init is actually harmful to the UART when earlycon is
used. If the device is pumping out data while the frequency
changes you'll see garbage on the serial console until the
driver can probe and actually set a proper frequency.
Fixes: 01a0a6cc8cfd ("clk: qcom: Park shared RCGs upon registration")
Fixes: d65d005f9a6c ("clk: qcom: add sc8280xp GCC driver")
Link: https://lore.kernel.org/all/20240819233628.2074654-2-swboyd@chromium.org/ [1]
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20240902070830.8535-1-johan+linaro@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/testing/selftests/net/lib.sh')
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