| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs | Xingyu Wu | 2023-07-19 | 1 | -2/+16 |
| * | dt-bindings: clock: Add StarFive JH7110 system clock and reset generator | Emil Renner Berthing | 2023-04-05 | 1 | -0/+104 |
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