Commit message (Collapse) | Author | Age | Files | Lines | |
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* | dt-bindings: net: convert mscc-miim to YAML format | Michael Walle | 2022-04-06 | 1 | -26/+0 |
| | | | | | | | | | | | | | | Convert the mscc-miim device tree binding to the new YAML format. The original binding don't mention if the interrupt property is optional or not. But on the SparX-5 SoC, for example, the interrupt property isn't used, thus in the new binding that property is optional. FWIW the driver doesn't use interrupts at all. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net> | ||||
* | dt-bindings: net: mscc-miim: add lan966x compatible | Michael Walle | 2022-03-22 | 1 | -1/+1 |
| | | | | | | | | | | | The MDIO controller has support to release the internal PHYs from reset by specifying a second memory resource. This is different between the currently supported SparX-5 and the LAN966x. Add a new compatible to distinguish between these two. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> | ||||
* | dt-bindings: net: add DT bindings for Microsemi MIIM | Alexandre Belloni | 2018-05-15 | 1 | -0/+26 |
DT bindings for the Microsemi MII Management Controller found on Microsemi SoCs Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net> |