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path: root/Documentation/devicetree/bindings/riscv/cpus.yaml (follow)
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* Merge tag 'soc-dt-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2023-11-021-0/+1
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| * dt-bindings: riscv: Add T-HEAD C920 compatiblesChen Wang2023-10-061-0/+1
* | dt-bindings: riscv: cpus: Add missing additionalProperties on interrupt-contr...Rob Herring2023-09-221-0/+1
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* dt-bindings: riscv: deprecate riscv,isaConor Dooley2023-07-051-23/+20
* Merge patch series "dt-bindings: riscv: cpus: switch to unevaluatedProperties...Palmer Dabbelt2023-06-231-1/+7
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| * dt-bindings: riscv: cpus: switch to unevaluatedProperties: falseConor Dooley2023-06-221-1/+1
| * dt-bindings: riscv: cpus: add a ref the common cpu schemaConor Dooley2023-06-221-0/+6
* | Merge patch series "ISA string parser cleanups"Palmer Dabbelt2023-06-231-2/+2
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| * | dt-bindings: riscv: explicitly mention assumption of Zicntr & Zihpm supportConor Dooley2023-06-211-2/+2
* | | dt-bindings: riscv: cpus: drop unneeded quotesKrzysztof Kozlowski2023-06-191-3/+3
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* / dt-bindings: riscv: drop invalid comment about riscv,isa lower-case reasoningConor Dooley2023-06-071-1/+1
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* dt-bindings: riscv: explicitly mention assumption of Zicsr & Zifencei supportConor Dooley2023-05-021-0/+6
* Merge tag 'riscv-for-linus-6.4-mw1' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2023-04-291-0/+6
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| * dt-bindings: riscv: add sv57 mmu-typeConor Dooley2023-04-261-0/+1
| * dt-bindings: riscv: Document cboz-block-sizeAndrew Jones2023-03-151-0/+5
* | dt-bindings: riscv: Add SiFive S7 compatibleHal Feng2023-04-051-0/+1
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* dt-bindings: riscv: add a capacity-dmips-mhz cpu propertyConor Dooley2023-02-151-0/+6
* Merge patch series "riscv,isa fixups"Palmer Dabbelt2023-01-061-1/+1
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| * dt-bindings: riscv: fix single letter canonical orderConor Dooley2023-01-061-1/+1
| * dt-bindings: riscv: fix underscore requirement for multi-letter extensionsConor Dooley2023-01-061-1/+1
* | dt-bindings: drop redundant part of title (manual)Krzysztof Kozlowski2022-12-161-1/+1
* | Merge tag 'riscv-dt-for-v6.2-mw0' of https://git.kernel.org/pub/scm/linux/ker...Arnd Bergmann2022-11-221-0/+2
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| * | dt-bindings: riscv: Add T-HEAD C906 and C910 compatiblesSamuel Holland2022-11-201-0/+2
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* | dt-bindings: riscv: Add Andes AX45MP core to the listLad Prabhakar2022-11-101-0/+1
* | dt-bindings: riscv: Sort the CPU core list alphabeticallyLad Prabhakar2022-11-101-5/+5
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* dt-bindings: riscv: add new riscv,isa strings for emulatorsConor Dooley2022-10-131-3/+2
* dt-bindings: riscv: document cbom-block-sizeHeiko Stuebner2022-07-291-0/+5
* dt-bindings: Fix phandle-array issues in the idle-states bindingsPalmer Dabbelt2022-04-021-0/+2
* dt-bindings: Add common bindings for ARM and RISC-V idle statesAnup Patel2022-03-101-0/+6
* dt-bindings: riscv: correct e51 and u54-mc CPU bindingsKrzysztof Kozlowski2021-09-211-2/+6
* dt-bindings: update risc-v cpu propertiesDamien Le Moal2021-02-231-0/+2
* dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoCYash Shah2021-01-081-0/+6
* dt-bindings: Explicitly allow additional properties in common schemasRob Herring2020-10-071-0/+2
* dt-bindings: Remove cases of 'allOf' containing a '$ref'Rob Herring2020-05-031-11/+9
* dt-bindings: riscv: Fix CPU schema errorsRob Herring2019-10-231-16/+13
* dt-bindings: riscv: remove obsolete cpus.txtPaul Walmsley2019-08-091-0/+12
* dt-bindings: Update the riscv,isa string descriptionAtish Patra2019-08-091-0/+4
* dt-bindings: riscv: Limit cpus schema to only check RiscV 'cpu' nodesRob Herring2019-07-211-82/+61
* dt-bindings: riscv: resolve 'make dt_binding_check' warningsPaul Walmsley2019-06-261-12/+14
* dt-bindings: riscv: convert cpu binding to json-schemaPaul Walmsley2019-06-171-0/+168
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