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path: root/arch/arc/kernel/mcip.c (follow)
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* ARC: boot log: eliminate struct cpuinfo_arc #3: don't exportVineet Gupta2023-08-181-2/+0
* arc: Bulk conversion to generic_handle_domain_irq()Marc Zyngier2021-08-121-1/+1
* ARCv2: IDU-intc: Add support for edge-triggered interruptsMischa Jonker2019-08-261-6/+54
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-191-4/+1
* ARC: mcip: update MCIP debug mask when the new cpu came onlineEugeniy Paltsev2018-02-281-5/+32
* ARC: mcip: halt GFRC counter when ARC cores haltEugeniy Paltsev2018-02-281-0/+37
* ARCv2: IDU-intc: Delete deprecated parameters in Device TreesYuriy Kolerov2017-02-061-16/+1
* ARCv2: IDU-intc: mask all common interrupts by defaultYuriy Kolerov2017-02-061-2/+10
* ARCv2: IDU-intc: Use build registers for getting numbers of interruptsYuriy Kolerov2017-02-061-10/+9
* ARCv2: MCIP: update the BCR per current changesVineet Gupta2017-01-241-2/+1
* ARCv2: MCIP: Deprecate setting of affinity in Device TreeYuriy Kolerov2017-01-241-30/+22
* ARCv2: IRQ: Call entry/exit functions for chained handlers in MCIPYuriy Kolerov2017-01-051-0/+4
* ARC: move mcip.h into include/soc and adjust the includesVineet Gupta2016-11-301-1/+1
* ARCv2: MCIP: Use IDU_M_DISTRI_DEST mode if there is only 1 destination coreYuriy Kolerov2016-11-081-2/+11
* ARC: IRQ: Do not use hwirq as virq and vice versaYuriy Kolerov2016-11-081-10/+9
* ARCv2: intc: untangle SMP, MCIP and IDUVineet Gupta2016-10-171-20/+11
* ARC: irq: export some IRQs againVineet Gupta2016-05-091-3/+0
* ARC: clocksource: DT based probeVineet Gupta2016-05-091-3/+1
* arc: SMP: CONFIG_ARC_IPI_DBG cleanupValentin Rothberg2016-02-241-5/+0
* ARC: SMP: No need for CONFIG_ARC_IPI_DBGVineet Gupta2016-02-241-8/+1
* ARCv2: Elide sending new cross core intr if receiver didn't ack prevVineet Gupta2016-02-241-17/+10
* ARCv2: SMP: Push IPI_IRQ into IPI providerVineet Gupta2016-02-241-0/+1
* ARCv2: SMP: Emulate IPI to self using software triggered interruptVineet Gupta2016-02-241-0/+15
* ARCv2: boot print Low Latency MemoryVineet Gupta2016-02-181-1/+2
* ARCv2: clocksource: Rename GRTC -> GFRC ...Vineet Gupta2016-01-291-5/+5
* ARC: rename smp operation init_irq_cpu() to init_per_cpu()Noam Camus2015-12-171-1/+1
* ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_smp()Vineet Gupta2015-10-281-8/+2
* ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_early_smp()Vineet Gupta2015-10-281-7/+8
* ARC: smp: Move default boot kick/wait code out of MCIP into common codeVineet Gupta2015-10-171-18/+0
* ARC: boot log: move helper macros to header for reuseVineet Gupta2015-10-171-2/+1
* genirq: Remove irq argument from irq flow handlersThomas Gleixner2015-09-161-1/+1
* arc/irq: Prepare idu_cascade_isr for irq argument removalThomas Gleixner2015-07-311-1/+2
* arc:irqchip: prepare for drivers/irqchip/irqchip.h removalJoël Porquet2015-07-091-1/+0
* ARCv2: intc: IDU: Fix potential race in installing a chained IRQ handlerVineet Gupta2015-07-061-2/+1
* ARCv2: intc: IDU: support irq affinityVineet Gupta2015-07-061-1/+18
* ARCv2: SMP: intc: IDU 2nd level intc for dynamic IRQ distributionVineet Gupta2015-06-221-1/+182
* ARCv2: SMP: clocksource: Enable Global Real Time counterVineet Gupta2015-06-221-0/+3
* ARCv2: SMP: ARConnect debug/robustnessVineet Gupta2015-06-221-4/+44
* ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et alVineet Gupta2015-06-221-0/+117
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