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path: root/arch/arm/boot/dts/r8a7792.dtsi (follow)
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* ARM: dts: r8a7792: Add CMT0 and CMT1 to r8a7792Magnus Damm2019-06-211-0/+34
* ARM: dts: r8a7792: blanche: Add IIC3 and DA9063 PMIC nodeMarek Vasut2019-03-191-0/+18
* ARM: dts: Include R-Car Gen2 product name in DTSI filesMagnus Damm2018-09-281-1/+1
* ARM: dts: rcar-gen2: Convert to new DU DT bindingsLaurent Pinchart2018-08-271-1/+0
* ARM: dts: convert to SPDX identifier for Renesas boardsWolfram Sang2018-07-231-4/+1
* ARM: dts: r8a7792: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
* ARM: dts: r8a7792: Add RWDT nodeGeert Uytterhoeven2018-04-251-0/+10
* ARM: dts: r8a7792: Adjust SMP routine sizeFabrizio Castro2018-04-251-1/+1
* ARM: dts: r8a7792: sort subnodes of soc nodeSimon Horman2018-02-121-249/+249
* Merge tag 'renesas-dt2-for-v4.16' of https://git.kernel.org/pub/scm/linux/ker...Olof Johansson2018-01-051-34/+30
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| * ARM: dts: r8a7792: move timer node out of busSimon Horman2017-12-201-12/+8
| * ARM: dts: r8a7792: sort root sub-nodes alphabeticallySimon Horman2017-12-201-24/+24
* | Merge tag 'renesas-dt-for-v4.16' of ssh://gitolite.kernel.org/pub/scm/linux/k...Arnd Bergmann2017-12-211-1/+2
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| * ARM: dts: r8a7792: Use R-Car SDHI Gen2 fallback compat stringSimon Horman2017-11-271-1/+2
* | ARM: dts: r8a779x: Add '#reset-cells' in cpg-mssrArnd Bergmann2017-11-201-0/+1
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* ARM: dts: r8a7792: Add missing clock for secondary CA15 CPU coreGeert Uytterhoeven2017-10-161-0/+1
* ARM: dts: r8a7792: Use R-Car GPIO Gen2 fallback compat stringSimon Horman2017-10-161-12/+12
* ARM: dts: r8a7792: Use generic node name for VSP1 nodesGeert Uytterhoeven2017-10-061-3/+3
* ARM: dts: r8a7792: Add reset control propertiesGeert Uytterhoeven2017-09-191-0/+45
* ARM: dts: r8a7792: Convert to new CPG/MSSR bindingsGeert Uytterhoeven2017-09-181-272/+61
* ARM: dts: r8a7792: Reserve SRAM for the SMP jump stubGeert Uytterhoeven2017-07-271-0/+8
* ARM: dts: r8a7792: Add Inter Connect RAMGeert Uytterhoeven2017-07-271-0/+10
* ARM: dts: r8a7792: Correct Z clockGeert Uytterhoeven2017-04-031-2/+9
* ARM: dts: r8a7792: Add INTC-SYS clock to device treeGeert Uytterhoeven2017-03-101-3/+8
* ARM: dts: r8a7792: Remove unit-address and reg from integrated cacheGeert Uytterhoeven2017-03-071-2/+1
* ARM: DTS: Fix register map for virt-capable GICMarc Zyngier2017-02-071-1/+1
* ARM: dts: r8a7792: Use R-Car Gen 2 fallback binding for msiof nodesSimon Horman2017-01-031-2/+4
* ARM: dts: r8a7792: Use R-Car Gen 2 fallback binding for i2c nodesSimon Horman2017-01-031-6/+12
* Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/ar...Linus Torvalds2016-12-161-2/+54
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| * ARM: dts: r8a7792: Add device node for PRRGeert Uytterhoeven2016-11-231-0/+5
| * ARM: dts: r8a7792: add MSIOF supportSergei Shtylyov2016-11-041-0/+30
| * ARM: dts: r8a7792: add MSIOF clocksSergei Shtylyov2016-11-041-2/+19
* | ARM: dts: r8a7792: Add device node for RST moduleGeert Uytterhoeven2016-11-021-0/+5
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* ARM: dts: r8a7792: add QSPI supportSergei Shtylyov2016-09-051-0/+16
* ARM: dts: r8a7792: add QSPI clockSergei Shtylyov2016-09-051-2/+5
* ARM: dts: r8a7792: add VSP1V supportSergei Shtylyov2016-08-231-0/+24
* ARM: dts: r8a7792: add VSP1V clocksSergei Shtylyov2016-08-231-3/+8
* ARM: dts: r8a7792: add DU supportSergei Shtylyov2016-08-091-0/+28
* ARM: dts: r8a7792: add DU clocksSergei Shtylyov2016-08-091-2/+11
* ARM: dts: r8a7792: fix misindented lineSergei Shtylyov2016-08-091-1/+1
* ARM: dts: r8a7792: add VIN supportSergei Shtylyov2016-08-091-0/+66
* ARM: dts: r8a7792: add VIN clocksSergei Shtylyov2016-08-091-3/+17
* ARM: dts: r8a7792: add I2C supportSergei Shtylyov2016-08-091-0/+82
* ARM: dts: r8a7792: add I2C clocksSergei Shtylyov2016-08-091-2/+7
* ARM: dts: r8a7792: add SDHI supportSergei Shtylyov2016-08-091-0/+12
* ARM: dts: r8a7792: add SD clocksSergei Shtylyov2016-08-091-0/+16
* ARM: dts: r8a7792: add CAN supportSergei Shtylyov2016-08-081-0/+24
* ARM: dts: r8a7792: add CAN clocksSergei Shtylyov2016-08-081-2/+20
* ARM: dts: r8a7792: add EtherAVB supportSergei Shtylyov2016-08-081-0/+12
* ARM: dts: r8a7792: add EtherAVB clocksSergei Shtylyov2016-08-081-0/+16
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