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cache-v6.S
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Author
Age
Files
Lines
*
ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
Russell King
2014-07-18
1
-10
/
+10
*
ARM: mm: implement LoUIS API for cache maintenance ops
Lorenzo Pieralisi
2012-09-25
1
-0
/
+3
*
ARM: 7408/1: cacheflush: return error to userspace when flushing syscall fails
Will Deacon
2012-05-02
1
-6
/
+4
*
ARM: mm: cache-v6: Use the new processor struct macros
Dave Martin
2011-07-07
1
-13
/
+2
*
ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_area
Will Deacon
2011-05-26
1
-0
/
+1
*
ARM: 6535/1: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fix
Valentine Barshak
2010-12-14
1
-8
/
+20
*
ARM: 6405/1: Handle __flush_icache_all for CONFIG_SMP_ON_UP
Tony Lindgren
2010-10-04
1
-11
/
+19
*
ARM: 6188/1: Add a config option for the ARM11MPCore DMA cache maintenance wo...
Catalin Marinas
2010-07-01
1
-3
/
+12
*
ARM: 6187/1: The v6_dma_inv_range() function must preserve data on SMP
Catalin Marinas
2010-07-01
1
-1
/
+2
*
ARM: 6111/1: Implement read/write for ownership in the ARMv6 DMA cache ops
Catalin Marinas
2010-05-08
1
-4
/
+13
*
ARM: dma-mapping: fix for speculative prefetching
Russell King
2010-02-15
1
-4
/
+6
*
ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range
Russell King
2010-02-15
1
-4
/
+2
*
ARM: dma-mapping: provide per-cpu type map/unmap functions
Russell King
2010-02-15
1
-0
/
+26
*
ARM: add size argument to __cpuc_flush_dcache_page
Russell King
2009-12-14
1
-5
/
+6
*
ARM: 5746/1: Handle possible translation errors in ARMv6/v7 coherent_user_range
Catalin Marinas
2009-10-07
1
-2
/
+18
*
[ARM] 5488/1: ARM errata: Invalidation of the Instruction Cache operation can...
Catalin Marinas
2009-04-30
1
-0
/
+33
*
[ARM] 3356/1: Workaround for the ARM1136 I-cache invalidation problem
Catalin Marinas
2006-03-10
1
-3
/
+4
*
[ARM] 3294/1: don't invalidate individual BTB entries on ARMv6
Nicolas Pitre
2006-02-01
1
-12
/
+6
*
[ARM] 2940/1: Fix BTB entry flush in arch/arm/mm/cache-v6.S
Gen FUKATSU
2005-09-30
1
-1
/
+8
*
Linux-2.6.12-rc2
v2.6.12-rc2
Linus Torvalds
2005-04-17
1
-0
/
+227