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cache-v7.S
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Author
Age
Files
Lines
*
ARM: cache-v7: optimise test for Cortex A9 r0pX devices
Russell King
2015-04-14
1
-4
/
+3
*
ARM: cache-v7: optimise branches in v7_flush_cache_louis
Russell King
2015-04-14
1
-9
/
+10
*
ARM: cache-v7: consolidate initialisation of cache level index
Russell King
2015-04-14
1
-2
/
+2
*
ARM: cache-v7: shift CLIDR to extract appropriate field before masking
Russell King
2015-04-14
1
-7
/
+6
*
ARM: cache-v7: use movw/movt instructions
Russell King
2015-04-14
1
-5
/
+6
*
ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
Russell King
2014-07-18
1
-15
/
+15
*
ARM: 8055/1: cacheflush: use -st dsb option for ensuring completion
Will Deacon
2014-05-26
1
-6
/
+6
*
ARM: 7919/1: mm: refactor v7 cache cleaning ops to use way/index sequence
Lorenzo Pieralisi
2013-12-29
1
-7
/
+7
*
ARM: mm: use inner-shareable barriers for TLB and user cache operations
Will Deacon
2013-08-12
1
-2
/
+2
*
ARM: 7752/1: errata: LoUIS bit field in CLIDR register is incorrect
Jon Medhurst
2013-06-17
1
-0
/
+8
*
arm: Add v7_invalidate_l1 to cache-v7.S
Dinh Nguyen
2013-02-12
1
-0
/
+46
*
ARM: 7606/1: cache: flush to LoUU instead of LoUIS on uniprocessor CPUs
Will Deacon
2012-12-20
1
-2
/
+4
*
Merge branch 'fixes' into for-linus
Russell King
2012-10-11
1
-0
/
+3
|
\
|
*
ARM: 7541/1: Add ARM ERRATA 775420 workaround
Simon Horman
2012-09-28
1
-0
/
+3
*
|
ARM: mm: rename jump labels in v7_flush_dcache_all function
Lorenzo Pieralisi
2012-09-25
1
-7
/
+7
*
|
ARM: mm: implement LoUIS API for cache maintenance ops
Lorenzo Pieralisi
2012-09-25
1
-0
/
+36
|
/
*
ARM: 7408/1: cacheflush: return error to userspace when flushing syscall fails
Will Deacon
2012-05-02
1
-6
/
+4
*
ARM: 7325/1: fix v7 boot with lockdep enabled
Rabin Vincent
2012-02-15
1
-1
/
+1
*
ARM: 7321/1: cache-v7: Disable preemption when reading CCSIDR
Stephen Boyd
2012-02-09
1
-0
/
+6
*
ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed
Will Deacon
2011-09-17
1
-0
/
+20
*
ARM: mm: cache-v7: Use the new processor struct macros
Dave Martin
2011-07-07
1
-13
/
+2
*
ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_area
Will Deacon
2011-05-26
1
-0
/
+2
*
Fix common misspellings
Lucas De Marchi
2011-03-31
1
-1
/
+1
*
ARM: 6528/1: Use CTR for the I-cache line size on ARMv7
Catalin Marinas
2010-12-13
1
-10
/
+17
*
ARM: 6405/1: Handle __flush_icache_all for CONFIG_SMP_ON_UP
Tony Lindgren
2010-10-04
1
-0
/
+16
*
ARM: Allow SMP kernels to boot on UP systems
Russell King
2010-10-04
1
-10
/
+4
*
ARM: 6139/1: ARMv7: Use the Inner Shareable I-cache on MP
Santosh Shilimkar
2010-05-21
1
-0
/
+4
*
ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMP
Catalin Marinas
2010-05-08
1
-0
/
+4
*
ARM: dma-mapping: fix for speculative prefetching
Russell King
2010-02-15
1
-4
/
+6
*
ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range
Russell King
2010-02-15
1
-4
/
+2
*
ARM: dma-mapping: provide per-cpu type map/unmap functions
Russell King
2010-02-15
1
-0
/
+26
*
ARM: add size argument to __cpuc_flush_dcache_page
Russell King
2009-12-14
1
-6
/
+7
*
ARM: 5746/1: Handle possible translation errors in ARMv6/v7 coherent_user_range
Catalin Marinas
2009-10-07
1
-2
/
+17
*
Thumb-2: Implement the unified arch/arm/mm support
Catalin Marinas
2009-07-24
1
-5
/
+11
*
ARMv7: Add extra barriers for flush_cache_all compressed/head.S
Catalin Marinas
2008-11-06
1
-0
/
+2
*
[ARM] 5227/1: Add the ENDPROC declarations to the .S files
Catalin Marinas
2008-09-01
1
-0
/
+10
*
[ARM] armv7: add support for ARMv7 cores.
Catalin Marinas
2007-05-08
1
-0
/
+253