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* KVM: arm64: nv: Punt stage-2 recycling to a vCPU requestOliver Upton2024-10-081-2/+26
* KVM: arm64: nv: Do not block when unmapping stage-2 if disallowedOliver Upton2024-10-081-3/+3
* KVM: arm64: nv: Keep reference on stage-2 MMU when scheduled outOliver Upton2024-10-081-3/+18
* Merge tag 'mm-stable-2024-09-20-02-31' of git://git.kernel.org/pub/scm/linux/...Linus Torvalds2024-09-211-1/+0
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| * mm: kvmalloc: align kvrealloc() with krealloc()Danilo Krummrich2024-09-021-1/+0
* | Merge branch kvm-arm64/nv-at-pan into kvmarm-master/nextMarc Zyngier2024-09-121-25/+15
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| * | KVM: arm64: nv: Sanitise SCTLR_EL1.EPAN according to VM configurationMarc Zyngier2024-08-301-0/+8
| * | KVM: arm64: nv: Make ps_to_output_size() generally availableMarc Zyngier2024-08-301-14/+0
| * | KVM: arm64: nv: Turn upper_attr for S2 walk into the full descriptorMarc Zyngier2024-08-301-6/+6
| * | KVM: arm64: nv: Enforce S2 alignment when contiguous bit is setMarc Zyngier2024-08-301-5/+2
* | | KVM: arm64: Add helper for last ditch idreg adjustmentsMarc Zyngier2024-08-271-10/+5
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* | KVM: arm64: free kvm->arch.nested_mmus with kvfree()Danilo Krummrich2024-08-021-1/+1
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* Merge branch kvm-arm64/nv-sve into kvmarm/nextOliver Upton2024-07-141-2/+1
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| * KVM: arm64: Allow the use of SVE+NVOliver Upton2024-06-201-2/+1
* | Merge branch kvm-arm64/ctr-el0 into kvmarm/nextOliver Upton2024-07-141-135/+123
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| * | KVM: arm64: nv: Unfudge ID_AA64PFR0_EL1 maskingOliver Upton2024-06-221-1/+1
| * | KVM: arm64: nv: Use accessors for modifying ID registersOliver Upton2024-06-201-134/+122
| * | KVM: arm64: Add helper for writing ID regsOliver Upton2024-06-201-2/+2
* | | Merge branch kvm-arm64/shadow-mmu into kvmarm/nextOliver Upton2024-07-141-5/+780
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| * | | KVM: arm64: nv: Truely enable nXS TLBI operationsMarc Zyngier2024-07-041-2/+2
| * | | KVM: arm64: nv: Add handling of range-based TLBI operationsMarc Zyngier2024-06-191-6/+2
| * | | KVM: arm64: nv: Add handling of outer-shareable TLBI operationsMarc Zyngier2024-06-191-1/+4
| * | | KVM: arm64: nv: Invalidate TLBs based on shadow S2 TTL-like informationMarc Zyngier2024-06-191-1/+84
| * | | KVM: arm64: nv: Handle FEAT_TTL hinted TLB operationsMarc Zyngier2024-06-191-0/+89
| * | | KVM: arm64: nv: Handle TLB invalidation targeting L2 stage-1Marc Zyngier2024-06-191-0/+35
| * | | KVM: arm64: nv: Unmap/flush shadow stage 2 page tablesChristoffer Dall2024-06-191-0/+42
| * | | KVM: arm64: nv: Handle shadow stage 2 page faultsMarc Zyngier2024-06-191-0/+45
| * | | KVM: arm64: nv: Implement nested Stage-2 page table walk logicChristoffer Dall2024-06-191-0/+264
| * | | KVM: arm64: nv: Support multiple nested Stage-2 mmu structuresMarc Zyngier2024-06-191-0/+218
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* | | Revert "KVM: arm64: nv: Fix RESx behaviour of disabled FGTs with negative pol...Oliver Upton2024-07-081-12/+12
* | | KVM: arm64: nv: Use GFP_KERNEL_ACCOUNT for sysreg_masks allocationOliver Upton2024-06-191-1/+1
* | | KVM: arm64: nv: Fix RESx behaviour of disabled FGTs with negative polarityMarc Zyngier2024-06-141-12/+12
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* / KVM: arm64: nv: Expose BTI and CSV_frac to a guest hypervisorMarc Zyngier2024-05-301-2/+4
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* KVM: arm64: nv: Advertise support for PAuthMarc Zyngier2024-04-201-6/+2
* KVM: arm64: nv: Add sanitising to VNCR-backed HCRX_EL2Marc Zyngier2024-02-191-0/+42
* KVM: arm64: nv: Add sanitising to VNCR-backed FGT sysregsMarc Zyngier2024-02-191-0/+128
* KVM: arm64: nv: Add sanitising to EL2 configuration registersMarc Zyngier2024-02-191-1/+57
* KVM: arm64: nv: Add sanitising to VNCR-backed sysregsMarc Zyngier2024-02-191-1/+40
* KVM: arm64: Expose ID_AA64MMFR4_EL1 to guestsMarc Zyngier2024-02-081-0/+7
* KVM: arm64: nv: Compute NV view of idregs as a one-offMarc Zyngier2023-12-191-7/+15
* KVM: arm64: nv: Add support for HCRX_EL2Marc Zyngier2023-08-171-1/+2
* KVM: arm64: nv: Expose FGT to nested guestsMarc Zyngier2023-08-171-2/+3
* KVM: arm64: nv: Expose FEAT_EVT to nested guestsMarc Zyngier2023-08-171-2/+1
* KVM: arm64: nv: Use reg_to_encoding() to get sysreg IDOliver Upton2023-02-111-2/+1
* KVM: arm64: nv: Filter out unsupported features from ID regsMarc Zyngier2023-02-111-0/+162