| Commit message (Expand) | Author | Age | Files | Lines |
* | MIPS: Remove NETLOGIC support | Thomas Bogendoerfer | 2021-10-24 | 1 | -1/+1 |
* | MIPS: Ingenic: Add system type for new Ingenic SoCs. | 周琰杰 (Zhou Yanjie) | 2021-07-19 | 1 | -2/+2 |
* | Revert "MIPS: Remove unused R4300 CPU support" | Lauri Kasanen | 2021-01-22 | 1 | -1/+1 |
* | MIPS: cpu-probe: remove MIPS_CPU_BP_GHIST option bit | Thomas Bogendoerfer | 2020-10-12 | 1 | -1/+0 |
* | MIPS: handle Loongson-specific GSExc exception | WANG Xuerui | 2020-07-31 | 1 | -0/+1 |
* | MIPS: only register FTLBPar exception handler for supported models | WANG Xuerui | 2020-07-31 | 1 | -0/+1 |
* | MIPS: X2000: Add X2000 system type. | 周琰杰 (Zhou Yanjie) | 2020-07-24 | 1 | -2/+4 |
* | mips: Add CP0 Write Merge config support | Serge Semin | 2020-05-22 | 1 | -1/+3 |
* | mips: Add MIPS Release 5 support | Serge Semin | 2020-05-22 | 1 | -4/+6 |
* | MIPS: Kernel: Identify Loongson-2K processors | Jiaxun Yang | 2020-04-26 | 1 | -0/+4 |
* | MIPS: Add MAC2008 Support | Jiaxun Yang | 2020-01-23 | 1 | -0/+1 |
* | MIPS: X1830: Add X1830 system type. | 周琰杰 (Zhou Yanjie) | 2020-01-09 | 1 | -2/+3 |
* | MIPS: Loongson: Rename LOONGSON1 to LOONGSON32 | Huacai Chen | 2019-11-11 | 1 | -1/+1 |
* | MIPS: Loongson64: Rename CPU TYPES | Jiaxun Yang | 2019-10-31 | 1 | -2/+2 |
* | MIPS: Loongson: Add Loongson-3A R4 basic support | Huacai Chen | 2019-10-07 | 1 | -1/+3 |
* | MIPS: Treat Loongson Extensions as ASEs | Jiaxun Yang | 2019-08-26 | 1 | -0/+4 |
* | MIPS: X1000: Add X1000 system type. | Zhou Yanjie | 2019-07-30 | 1 | -1/+1 |
* | MIPS: Remove unused R8000 CPU support | Paul Burton | 2019-07-23 | 1 | -5/+0 |
* | MIPS: Remove unused R5432 CPU support | Paul Burton | 2019-07-23 | 1 | -1/+1 |
* | MIPS: Remove unused R4300 CPU support | Paul Burton | 2019-07-23 | 1 | -1/+1 |
* | MIPS: Rename JZRISC to XBURST | Paul Cercueil | 2019-07-22 | 1 | -2/+2 |
* | MIPS: replace MBIT_ULL() with BIT_ULL() | Masahiro Yamada | 2019-05-29 | 1 | -65/+60 |
* | MIPS: MemoryMapID (MMID) Support | Paul Burton | 2019-02-04 | 1 | -0/+1 |
* | MIPS: Loongson: Add Loongson-3A R2.1 basic support | Huacai Chen | 2018-11-20 | 1 | -1/+2 |
* | MIPS: Loongson: Add Loongson-3A R3.1 basic support | Huacai Chen | 2018-07-24 | 1 | -25/+26 |
* | MIPS: Probe for MIPS MT perf counters per TC | Matt Redfearn | 2018-05-15 | 1 | -0/+2 |
* | License cleanup: add SPDX GPL-2.0 license identifier to files with no license | Greg Kroah-Hartman | 2017-11-02 | 1 | -0/+1 |
* | MIPS: Remove unused R6000 support | Paul Burton | 2017-08-29 | 1 | -5/+0 |
* | MIPS: MIPS16e2: Identify ASE presence | Maciej W. Rozycki | 2017-07-05 | 1 | -0/+1 |
* | MIPS: Add CPU shared FTLB feature detection | Paul Burton | 2017-06-29 | 1 | -0/+4 |
* | MIPS: Loongson: Add Loongson-3A R3 basic support | Huacai Chen | 2017-06-28 | 1 | -0/+1 |
* | MIPS: Probe the I6500 CPU | Paul Burton | 2017-06-28 | 1 | -1/+2 |
* | MIPS: Add defs & probing of UFR | James Hogan | 2017-03-28 | 1 | -0/+1 |
* | MIPS: Add CPU support for Loongson1C | Yang Ling | 2016-10-04 | 1 | -0/+1 |
* | MIPS: Add probing & defs for VZ & guest features | James Hogan | 2016-05-13 | 1 | -0/+5 |
* | MIPS: Add perf counter feature | James Hogan | 2016-05-13 | 1 | -0/+1 |
* | MIPS: Add defs & probing of [X]ContextConfig | James Hogan | 2016-05-13 | 1 | -0/+1 |
* | MIPS: Add defs & probing of BadInstr[P] registers | James Hogan | 2016-05-13 | 1 | -0/+2 |
* | MIPS: Add defs & probing of extended CP0_EBase | James Hogan | 2016-05-13 | 1 | -0/+1 |
* | MIPS: Separate XPA CPU feature into LPA and MVH | James Hogan | 2016-05-13 | 1 | -1/+2 |
* | MIPS: Loongson-3: Fast TLB refill handler | Huacai Chen | 2016-05-13 | 1 | -0/+1 |
* | MIPS: Loongson: Add Loongson-3A R2 basic support | Huacai Chen | 2016-05-13 | 1 | -1/+3 |
* | MIPS: Detect DSP v3 support | Zubair Lutfullah Kakakhel | 2016-05-13 | 1 | -0/+1 |
* | MIPS: cpu: Convert MIPS_CPU_* defs to (1ull << x) | James Hogan | 2016-05-13 | 1 | -41/+48 |
* | MIPS: cpu: Alter MIPS_CPU_* definitions to fill gap | James Hogan | 2016-05-13 | 1 | -8/+8 |
* | MIPS: Add M6250 PRID & cpu_type_enum values | Paul Burton | 2016-05-13 | 1 | -1/+2 |
* | MIPS: Add P6600 PRID & cpu_type_enum values | Paul Burton | 2016-05-13 | 1 | -1/+2 |
* | MIPS: <asm/cpu.h>: Reformat to 80 columns. | Ralf Baechle | 2016-05-13 | 1 | -2/+2 |
* | MIPS: Detect MIPSr6 Virtual Processor support | Paul Burton | 2016-05-13 | 1 | -0/+1 |
* | MIPS: Add CPU identifiers and probing for Cavium CN73xx and CNF75xx processors. | David Daney | 2016-05-13 | 1 | -0/+2 |