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path: root/arch/mips/include/asm/hazards.h (follow)
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* MIPS: Remove NETLOGIC supportThomas Bogendoerfer2021-10-241-1/+1
* mips: Add MIPS Release 5 supportSerge Semin2020-05-221-3/+5
* MIPS: Loongson64: Bump ISA level to MIPSR2Jiaxun Yang2020-01-231-2/+2
* MIPS: Loongson: Unify LOONGSON3/LOONGSON64 Kconfig usageHuacai Chen2019-11-111-2/+2
* MIPS: Loongson64: Rename CPU TYPESJiaxun Yang2019-10-311-2/+2
* MIPS: Avoid using .set mips0 to restore ISAPaul Burton2018-11-091-2/+4
* MIPS: hazards.h: Fix typoAndrea Gelmini2016-05-281-4/+4
* MIPS: Loongson-3: Introduce CONFIG_LOONGSON3_ENHANCEMENTHuacai Chen2016-05-131-3/+4
* MIPS: hazards: Add hazard macros for tlb readJames Hogan2015-06-211-0/+52
* MIPS: asm: hazards: Add MIPSR6 definitionsMarkos Chandras2015-02-171-4/+5
* MIPS: Get rid of the use of .macro in C code.Ralf Baechle2013-04-111-128/+243
* Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-j...Ralf Baechle2013-02-211-1/+1
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| * MIPS: Netlogic: No hazards needed for XLR/XLSJayachandran C2013-02-171-1/+1
* | MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-3/+3
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* MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle2012-12-131-25/+0
* MIPS: BMIPS: Add CFLAGS, Makefile entries for BMIPSKevin Cernekee2011-12-071-1/+2
* MIPS: Clean up whitespace warning in hazards.hKevin Cernekee2011-12-071-2/+2
* MIPS: Alchemy: remove SOC_AU1X00 in favor of MIPS_ALCHEMYManuel Lauss2010-08-051-2/+2
* MIPS: Loongson 2 needs no hazard barriers.Zhang Le2009-05-141-2/+3
* MIPS: Alchemy: MIPS hazard workarounds are not required.Manuel Lauss2009-03-301-2/+2
* MIPS: NEC VR5500 processor support fixupShinya Kuribayashi2009-03-111-1/+2
* MIPS: For Cavium OCTEON handle hazards as per the R10000 handling.David Daney2009-01-111-2/+2
* MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle2008-10-111-0/+271