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war.h
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Commit message (
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Author
Age
Files
Lines
*
MIPS: Remove mach-*/war.h
Thomas Bogendoerfer
2020-09-07
1
-12
/
+0
*
MIPS: Get rid of CAVIUM_OCTEON_DCACHE_PREFETCH_WAR
Thomas Bogendoerfer
2020-09-07
1
-3
/
+0
*
MIPS: Get rid of BCM1250_M3_WAR
Thomas Bogendoerfer
2020-09-07
1
-2
/
+0
*
MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDS
Thomas Bogendoerfer
2020-09-07
1
-1
/
+0
*
MIPS: Convert MIPS34K_MISSED_ITLB_WAR into a config option
Thomas Bogendoerfer
2020-09-07
1
-1
/
+0
*
MIPS: Convert R10000_LLSC_WAR info a config option
Thomas Bogendoerfer
2020-09-07
1
-1
/
+0
*
MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR into a config option
Thomas Bogendoerfer
2020-09-07
1
-1
/
+0
*
MIPS: Convert TX49XX_ICACHE_INDEX_INV into a config option
Thomas Bogendoerfer
2020-09-07
1
-1
/
+0
*
MIPS: Remove MIPS4K_ICACHE_REFILL_WAR and MIPS_CACHE_SYNC_WAR
Thomas Bogendoerfer
2020-09-07
1
-2
/
+0
*
MIPS: Convert R4600_V2_HIT_CACHEOP into a config option
Thomas Bogendoerfer
2020-09-07
1
-1
/
+0
*
MIPS: Convert R4600_V1_HIT_CACHEOP into a config option
Thomas Bogendoerfer
2020-09-07
1
-1
/
+0
*
MIPS: Convert R4600_V1_INDEX_ICACHEOP into a config option
Thomas Bogendoerfer
2020-09-07
1
-1
/
+0
*
MIPS: Remove unused R5432_CP0_INTERRUPT_WAR
Paul Burton
2019-07-23
1
-1
/
+0
*
MIPS: OCTEON: Implement DCache errata workaround for all CN6XXX
David Daney
2015-02-20
1
-0
/
+3
*
MIPS: PMC-Sierra Yosemite: Remove support.
Ralf Baechle
2012-12-13
1
-1
/
+0
*
MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.
David Daney
2009-01-11
1
-0
/
+26