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* MIPS: Remove mach-*/war.hThomas Bogendoerfer2020-09-071-11/+0
* MIPS: Get rid of BCM1250_M3_WARThomas Bogendoerfer2020-09-071-2/+0
* MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDSThomas Bogendoerfer2020-09-071-1/+0
* MIPS: Convert MIPS34K_MISSED_ITLB_WAR into a config optionThomas Bogendoerfer2020-09-071-1/+0
* MIPS: Convert R10000_LLSC_WAR info a config optionThomas Bogendoerfer2020-09-071-1/+0
* MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR into a config optionThomas Bogendoerfer2020-09-071-1/+0
* MIPS: Convert TX49XX_ICACHE_INDEX_INV into a config optionThomas Bogendoerfer2020-09-071-1/+0
* MIPS: Remove MIPS4K_ICACHE_REFILL_WAR and MIPS_CACHE_SYNC_WARThomas Bogendoerfer2020-09-071-2/+0
* MIPS: Convert R4600_V2_HIT_CACHEOP into a config optionThomas Bogendoerfer2020-09-071-5/+0
* MIPS: Convert R4600_V1_HIT_CACHEOP into a config optionThomas Bogendoerfer2020-09-071-1/+0
* MIPS: Convert R4600_V1_INDEX_ICACHEOP into a config optionThomas Bogendoerfer2020-09-071-1/+0
* MIPS: SGI-IP22/28: Use PROM for memory detectionThomas Bogendoerfer2019-10-091-9/+0
* MIPS: SGI-IP22: set PHYS_OFFSET to memory startThomas Bogendoerfer2019-10-091-2/+1
* MIPS: Remove unused R5432_CP0_INTERRUPT_WARPaul Burton2019-07-231-1/+0
* MIPS16e2: Provide feature overrides for non-MIPS16 systemsMaciej W. Rozycki2017-07-111-0/+1
* MIPS: Correct `nofpu' non-functionalityMaciej W. Rozycki2015-04-081-1/+0
* MIPS: IP22: This platform may come with either MIPS III or MIPS IV CPUs.Ralf Baechle2014-05-231-0/+4
* MIPS: Optimize current_cpu_type() for better code.Ralf Baechle2013-09-171-0/+2
* MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle2012-12-131-1/+0
* MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.Ralf Baechle2012-10-111-0/+1
* MIPS: IP22/28: Switch over to RTC class driverThomas Bogendoerfer2008-10-151-18/+0
* MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle2008-10-114-0/+118
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