summaryrefslogtreecommitdiffstats
path: root/arch/mips/include/asm/mipsregs.h (follow)
Commit message (Expand)AuthorAgeFilesLines
* MIPS: cpu-probe: Set the FTLB probability bit on supported coresMarkos Chandras2014-11-241-0/+2
* MIPS: Fix build with binutils 2.24.51+Manuel Lauss2014-11-071-1/+10
* MIPS: mipsreg: remove duplicate MIPS_CONF4_FTLBSETS_SHIFTDan Carpenter2014-08-021-1/+0
* MIPS: define MAAR register accessors & bitsPaul Burton2014-08-021-0/+12
* MIPS: kernel: cpu-probe: Detect unique RI/XI exceptionsLeonid Yegoshin2014-08-021-0/+1
* MIPS: asm: Add register definitions for Hardware Table WalkerMarkos Chandras2014-08-021-0/+44
* MIPS: Add function get_ebase_cpunumDavid Daney2014-05-301-0/+9
* MIPS: MT: Remove SMTC supportRalf Baechle2014-05-241-132/+1
* MIPS: Disable MIPS16/microMIPS crap for platforms not supporting these ASEs.Ralf Baechle2014-05-231-1/+8
* MIPS: Add MSA register definitions & accessPaul Burton2014-03-261-0/+1
* MIPS: Add CP0 CMGCRBase definitions & accessorPaul Burton2014-03-061-0/+6
* MIPS: Define Config1 cache field shifts & sizesPaul Burton2014-03-061-0/+12
* MIPS: mm: c-r4k: Detect instruction cache aliasesMarkos Chandras2014-03-061-0/+3
* MIPS: include linux/types.hQais Yousef2014-01-231-0/+1
* MIPS: Add support for FTLBsLeonid Yegoshin2014-01-221-0/+2
* MIPS: Add function for flushing the TLB using the TLBINV instructionLeonid Yegoshin2014-01-221-0/+13
* MIPS: features: Add initial support for Segmentation Control registersSteven J. Hill2014-01-221-0/+29
* MIPS: Add missing bits for Config registersLeonid Yegoshin2014-01-221-2/+38
* MIPS: Add MIPS R5 config5 register.Ralf Baechle2013-09-191-0/+7
* MIPS: microMIPS: Fix improper definition of ISA exception bit.Steven J. Hill2013-07-011-1/+1
* MIPS: microMIPS: Add support for exception handling.Steven J. Hill2013-05-091-0/+1
* MIPS: microMIPS: Add instruction utility macros.Steven J. Hill2013-05-011-0/+18
* MIPS: Fix code generation for non-DSP capable CPUsFlorian Fainelli2013-03-191-19/+190
* Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-j...Ralf Baechle2013-02-211-186/+125
|\
| * MIPS: Probe for and report hardware virtualization support.David Daney2013-02-191-0/+1
| * MIPS: dsp: Simplify the DSP macros.Steven J. Hill2013-02-171-201/+30
| * MIPS: dsp: Support toolchains without DSP ASE and microMIPS.Steven J. Hill2013-02-171-0/+89
| * MIPS: dsp: Add assembler support for DSP ASEs.Steven J. Hill2013-02-171-17/+36
| * MIPS: Add support for the M14KEc core.Steven J. Hill2013-02-171-0/+1
* | MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-199/+199
* | MIPS: Whitespace cleanups and reformatting.Steven J. Hill2013-02-011-11/+15
|/
* MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle2012-12-131-8/+0
* MIPS: Control huge tlb support via Kconfig symbol MIPS_HUGE_TLB_SUPPORTDavid Daney2012-12-121-1/+1
* MIPS: Add detection of DSP ASE Revision 2.Steven J. Hill2012-10-111-0/+1
* MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)Al Cooper2012-10-111-0/+2
* Merge branch 'ralf-3.7' of git://git.linux-mips.org/pub/scm/sjhill/linux-sjhi...Ralf Baechle2012-09-281-0/+2
|\
| * MIPS: Add support for the 1074K core.Steven J. Hill2012-09-131-0/+2
* | MIPS: Add base architecture support for RI and XI.Steven J. Hill2012-09-131-0/+1
|/
* MIPS: BMIPS: Add set/clear CP0 macros for BMIPS operationsKevin Cernekee2011-12-071-1/+8
* MIPS: Add accessor macros for 64-bit performance counter registers.David Daney2011-10-251-0/+8
* Fix common misspellingsLucas De Marchi2011-03-311-2/+2
* MIPS: Add BMIPS CP0 register definitionsKevin Cernekee2010-10-291-0/+51
* MIPS: Define ST0_NMI in asm/mipsregs.hDavid Daney2010-08-051-0/+1
* MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1Shane McDonald2010-05-151-1/+8
* MIPS: Add accessor functions and bit definitions for c0_PageGrainDavid Daney2010-02-271-0/+11
* MIPS: Decode c0_config4 for large TLBs.David Daney2010-02-271-0/+4
* MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQsDavid VomLehn2010-01-281-0/+12
* MIPS: Add hugetlbfs page defines.David Daney2009-06-171-0/+16
* MIPS: Fix sign-extension bug in 32-bit kernel on 32-bit hardware.Ralf Baechle2009-05-141-4/+4
* MIPS: Cavium: Add support for 8k and 32k page sizes.Ralf Baechle2009-05-141-0/+11
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-19 05:35:36 +0100