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* Merge branch 'exec_domain_rip_v2' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds2015-04-151-2/+0
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| * arch: Remove exec_domain from remaining archsRichard Weinberger2015-04-121-2/+0
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Linus Torvalds2015-04-151-14/+0
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| * | MIPS: BCM63xx: remove RSET_RNG register definitionsFlorian Fainelli2015-03-011-14/+0
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* | mm: fold arch_randomize_brk into ARCH_HAS_ELF_RANDOMIZEKees Cook2015-04-151-4/+0
* | Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds2015-04-131-4/+3
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| * | jump_label: Allow asm/jump_label.h to be included in assemblyAnton Blanchard2015-04-091-4/+3
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* | MIPS: KVM: Add MSA exception handlingJames Hogan2015-03-271-0/+16
* | MIPS: KVM: Add base guest MSA supportJames Hogan2015-03-271-1/+20
* | MIPS: KVM: Add FP exception handlingJames Hogan2015-03-271-0/+8
* | MIPS: KVM: Add base guest FPU supportJames Hogan2015-03-271-0/+27
* | MIPS: KVM: Add vcpu_get_regs/vcpu_set_regs callbackJames Hogan2015-03-271-0/+2
* | MIPS: KVM: Add Config4/5 and writing of Config registersJames Hogan2015-03-271-0/+13
* | MIPS: KVM: Simplify default guest Config registersJames Hogan2015-03-271-25/+0
* | MIPS: KVM: Clean up register definitions a littleJames Hogan2015-03-271-2/+2
* | MIPS: KVM: Implement PRid CP0 register accessJames Hogan2015-03-271-0/+1
* | MIPS: KVM: Handle TRAP exceptions from guest kernelJames Hogan2015-03-271-0/+8
* | MIPS: Clear [MSA]FPE CSR.Cause after notify_die()James Hogan2015-03-271-1/+2
* | MIPS: KVM: Handle MSA Disabled exceptions from guestJames Hogan2015-03-271-0/+2
* | MIPS: MSA: Fix big-endian FPR_IDX implementationJames Hogan2015-03-271-1/+1
* | Revert "MIPS: Don't assume 64-bit FP registers for context switch"James Hogan2015-03-272-128/+128
* | MIPS: disable FPU if the mode is unsupportedPaul Burton2015-03-271-7/+12
* | MIPS: wrap cfcmsa & ctcmsa accesses for toolchains with MSA supportPaul Burton2015-03-271-4/+20
* | MIPS: remove MSA macro recursionPaul Burton2015-03-271-3/+31
* | MIPS: assume at as source/dest of MSA copy/insert instructionsPaul Burton2015-03-271-16/+12
* | MIPS: Push .set mips64r* into the functions needing itPaul Burton2015-03-271-8/+4
* | MIPS: lose_fpu(): Disable FPU when MSA enabledJames Hogan2015-03-271-0/+1
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* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2015-02-2245-390/+1149
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| * MIPS: OCTEON: More OCTEONIII supportChandrakala Chavva2015-02-202-0/+309
| * MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.Chad Reese2015-02-201-20/+0
| * MIPS: OCTEON: Core-15169 Workaround and general CVMSEG cleanup.David Daney2015-02-201-3/+16
| * MIPS: OCTEON: Update octeon-model.h code for new SoCs.David Daney2015-02-201-22/+85
| * MIPS: OCTEON: Implement DCache errata workaround for all CN6XXXDavid Daney2015-02-201-0/+3
| * MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.hDavid Daney2015-02-201-30/+105
| * MIPS: OCTEON: Implement the core-16057 workaroundDavid Daney2015-02-201-0/+22
| * MIPS: OCTEON: Save and restore CP2 SHA3 stateDavid Daney2015-02-201-0/+2
| * MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUsDavid Daney2015-02-202-2/+15
| * MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.hDavid Daney2015-02-201-6/+0
| * MIPS: ip22-gio: Remove legacy suspend/resume supportLars-Peter Clausen2015-02-201-2/+0
| * mips: pci: Add ifdef around pci_proc_domainZubair Lutfullah Kakakhel2015-02-201-0/+2
| * MIPS: Add set/clear CP0 macros for PageGrain registerSteven J. Hill2015-02-201-0/+1
| * MIPS: Usage and cosmetic cleanups of page table bits.Steven J. Hill2015-02-192-62/+38
| * Merge branch 'mipsr6-for-3.20' of git://git.linux-mips.org/pub/scm/mchandras/...Ralf Baechle2015-02-1928-170/+483
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| | * MIPS: kernel: elf: Improve the overall ABI and FPU mode checksMarkos Chandras2015-02-171-4/+6
| | * MIPS: asm: fpu: Allow 64-bit FPU on MIPS32 R6Markos Chandras2015-02-171-1/+2
| | * MIPS: Handle MIPS IV, V and R2 FPU instructions on MIPS R6 as wellMarkos Chandras2015-02-171-1/+2
| | * MIPS: Make use of the ERETNC instruction on MIPS R6Markos Chandras2015-02-172-4/+7
| | * MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6Leonid Yegoshin2015-02-172-3/+96
| | * MIPS: asm: mipsregs: Add support for the LLADDR registerMarkos Chandras2015-02-171-0/+2
| | * MIPS: Add LLB bit and related feature for the Config 5 CP0 registerMarkos Chandras2015-02-173-0/+5
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