summaryrefslogtreecommitdiffstats
path: root/arch/mips/kernel/genex.S (follow)
Commit message (Expand)AuthorAgeFilesLines
* MIPS: handle Loongson-specific GSExc exceptionWANG Xuerui2020-07-311-0/+14
* MIPS: Fix IRQ tracing when call handle_fpe() and handle_msa_fpe()YuanJunQing2020-05-271-3/+3
* MIPS: asm: Rename some macros to avoid build errorsHuacai Chen2020-05-071-3/+3
* MIPS: genex: Don't reload address unnecessarilyPaul Burton2019-10-071-2/+2
* MIPS: genex: Add Loongson3 LL/SC workaround to ejtag_debug_handlerPaul Burton2019-10-071-0/+2
* MIPS: r4k-bugs64: Limit R4k bug checks to affected systemsPaul Burton2019-10-071-1/+1
* MIPS: Remove unused R5432_CP0_INTERRUPT_WARPaul Burton2019-07-231-3/+0
* MIPS: Avoid using .set mips0 to restore ISAPaul Burton2018-11-091-1/+2
* MIPS: traps: Never enable FPU when CONFIG_MIPS_FP_SUPPORT=nPaul Burton2018-11-091-0/+2
* MIPS: Fix ejtag handler on SMPHeiher2018-06-241-0/+46
* MIPS: Add DWARF unwinding to assemblyCorey Minyard2017-09-061-5/+8
* MIPS: IRQ Stack: Unwind IRQ stack onto task stackMatt Redfearn2017-03-221-2/+6
* MIPS: Check TLB before handle_ri_rdhwr() for Loongson-3Huacai Chen2017-03-211-2/+2
* MIPS: IRQ Stack: Fix erroneous jal to plat_irq_dispatchMatt Redfearn2017-02-131-1/+1
* MIPS: Switch to the irq_stack in interruptsMatt Redfearn2017-01-031-5/+76
* MIPS: Fix BUILD_ROLLBACK_PROLOGUE for microMIPSPaul Burton2016-09-291-2/+1
* MIPS: genex: Indent delay slots & clean whitespaceJames Hogan2016-05-131-28/+28
* MIPS: Support extended ASIDsPaul Burton2016-05-131-1/+1
* MIPS: Add & use CP0_EntryHi ASID definitionsJames Hogan2016-05-131-1/+1
* MIPS: Fix LLVM build issue.Ralf Baechle2015-08-181-1/+1
* MIPS: Clear [MSA]FPE CSR.Cause after notify_die()James Hogan2015-03-271-10/+4
* MIPS: clear MSACSR cause bits when handling MSA FP exceptionPaul Burton2015-03-271-1/+10
* MIPS: kernel: genex: Set correct ISA levelMarkos Chandras2015-02-171-1/+1
* MIPS: Fix build with binutils 2.24.51+Manuel Lauss2014-11-071-0/+1
* MIPS: MT: Remove SMTC supportRalf Baechle2014-05-241-54/+0
* MIPS: Fix gigaton of warning building with microMIPS.Ralf Baechle2014-03-311-3/+3
* MIPS: Dumb MSA FP exception handlerPaul Burton2014-03-261-0/+1
* MIPS: Basic MSA context switching supportPaul Burton2014-03-261-0/+1
* MIPS: Add support for FTLBsLeonid Yegoshin2014-01-221-0/+1
* MIPS: Print correct PC in trace dump after NMI exceptionLeonid Yegoshin2013-10-291-3/+11
* MIPS: Idle: Break r4k_wait into two functions and fix it.Ralf Baechle2013-05-221-3/+3
* Revert "MIPS: Allow ASID size to be determined at boot time."David Daney2013-05-161-1/+1
* MIPS: microMIPS: Add support for exception handling.Steven J. Hill2013-05-091-19/+54
* MIPS: Allow ASID size to be determined at boot time.Steven J. Hill2013-05-081-1/+1
* MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-7/+7
* MIPS: Switch remaining assembler PAGE_SIZE users to <asm/asm-offsets.h>.Ralf Baechle2012-12-281-3/+2
* MIPS: Read watch registers with interrupts disabled.David Daney2009-01-301-1/+5
* MIPS: Override assembler target architecture for octeon.David Daney2009-01-111-0/+4
* MIPS: Watch exception handling for HARDWARE_WATCHPOINTS.David Daney2008-10-111-0/+4
* [MIPS] SMTC: Fix SMTC dyntick support.Kevin D. Kissell2008-10-031-2/+2
* [MIPS] Fix potential latency problem due to non-atomic cpu_wait.Atsushi Nemoto2008-09-211-0/+37
* [MIPS] R4000/R4400 daddiu erratum workaroundMaciej W. Rozycki2008-01-291-1/+7
* [MIPS] Fix typo in R3000 TRACE_IRQFLAGS codeAtsushi Nemoto2007-11-161-1/+1
* [MIPS] SMTC: Interrupt mask backstop hackKevin D. Kissell2007-07-121-0/+2
* [MIPS] lockdep: Deal with interrupt disable hazard in TRACE_IRQFLAGSChris Dearman2007-03-301-0/+31
* [MIPS] Export except_vec_vi_{mori,lui,ori} as text symbols.Ralf Baechle2007-03-191-3/+3
* [MIPS] VI: TRACE_IRQS_OFF clobbers $v0, so save & restore around call.Ralf Baechle2007-03-191-0/+10
* [MIPS] Fast path for rdhwr emulation for TLSAtsushi Nemoto2006-11-301-0/+63
* [MIPS] ret_from_irq adjustmentAtsushi Nemoto2006-10-101-5/+3
* [MIPS] Complete fixes after removal of pt_regs argument to int handlers.Ralf Baechle2006-10-081-5/+10