| Commit message (Expand) | Author | Age | Files | Lines |
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 182 | Thomas Gleixner | 2019-05-30 | 1 | -12/+1 |
* | MIPS: Use mips_gic_present() in place of gic_present | Paul Burton | 2017-09-04 | 1 | -4/+2 |
* | MIPS: SMP: Allow boot_secondary SMP op to return errors | Paul Burton | 2017-08-30 | 1 | -1/+3 |
* | MIPS: Abstract CPU core & VP(E) ID access through accessor functions | Paul Burton | 2017-08-30 | 1 | -1/+1 |
* | MIPS: SMP: Constify smp ops | Matt Redfearn | 2017-08-29 | 1 | -1/+1 |
* | MIPS: smp-mt: Use CPU interrupt controller IPI IRQ domain support | Paul Burton | 2017-04-12 | 1 | -45/+4 |
* | MIPS: Add missing include files | Arnd Bergmann | 2017-03-08 | 1 | -0/+1 |
* | MIPS: Move identification of VP(E) into proc.c from smp-mt.c | Matt Redfearn | 2016-10-04 | 1 | -23/+0 |
* | MIPS: Make smp CMP, CPS and MT use the new generic IPI functions | Qais Yousef | 2016-02-25 | 1 | -1/+1 |
* | mips: fix up obsolete cpu function usage. | Rusty Russell | 2015-03-05 | 1 | -2/+2 |
* | MIPS: smp-mt,smp-cmp: Enable all HW IRQs on secondary CPUs | James Hogan | 2015-01-16 | 1 | -1/+2 |
* | MIPS: Move gic.h to include/linux/irqchip/mips-gic.h | Andrew Bresticker | 2014-11-24 | 1 | -1/+1 |
* | MIPS: Move GIC to drivers/irqchip/ | Andrew Bresticker | 2014-11-24 | 1 | -2/+2 |
* | MIPS: smp-mt: Fix link error when PROC_FS=n | James Hogan | 2014-08-01 | 1 | -0/+2 |
* | MIPS: SMP: Remove plat_smp_ops cpus_done method. | Ralf Baechle | 2014-05-27 | 1 | -5/+0 |
* | MIPS: smp-mt: Use common GIC IPI implementation | Paul Burton | 2014-03-31 | 1 | -22/+1 |
* | MIPS: MT: proc: Add support for printing VPE and TC ids | Ralf Baechle | 2014-03-31 | 1 | -0/+22 |
* | MIPS: GIC: Send IPIs using the GIC | Steven J. Hill | 2014-01-22 | 1 | -0/+27 |
* | MIPS: MT: Mark existing TCs as present | Markos Chandras | 2014-01-22 | 1 | -0/+1 |
* | MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code | Paul Gortmaker | 2013-07-15 | 1 | -3/+3 |
* | MIPS: Move 'gic_present' to common location. | Steven J. Hill | 2013-05-09 | 1 | -2/+1 |
* | MIPS: Whitespace cleanup. | Ralf Baechle | 2013-02-01 | 1 | -2/+2 |
* | MIPS: Fix build error for non-malta VSMP kernel | Anoop P A | 2012-08-22 | 1 | -0/+2 |
* | Disintegrate asm/system.h for MIPS | David Howells | 2012-03-28 | 1 | -1/+0 |
* | atomic: use <linux/atomic.h> | Arun Sharma | 2011-07-27 | 1 | -1/+1 |
* | Fix common misspellings | Lucas De Marchi | 2011-03-31 | 1 | -1/+1 |
* | MIPS: MT: Fix typo in comment. | Ralf Baechle | 2010-12-16 | 1 | -1/+1 |
* | cpumask: Use accessors for cpu_*_mask: mips | Rusty Russell | 2009-09-24 | 1 | -1/+1 |
* | cpumask: arch_send_call_function_ipi_mask: mips | Rusty Russell | 2009-09-24 | 1 | -2/+2 |
* | cpumask: centralize cpu_online_map and cpu_possible_map | Rusty Russell | 2008-12-13 | 1 | -1/+1 |
* | [MIPS] Add support for MIPS CMP platform. | Ralf Baechle | 2008-04-28 | 1 | -81/+15 |
* | [MIPS] Remove TLB sanitation code | Chris Dearman | 2008-04-28 | 1 | -47/+0 |
* | [MIPS] SMP: Call platform methods via ops structure. | Ralf Baechle | 2008-01-29 | 1 | -87/+106 |
* | [MIPS] MT: Scheduler support for SMT | Ralf Baechle | 2008-01-29 | 1 | -1/+5 |
* | [MIPS] Fix "no space between function name and open parenthesis" warnings. | Ralf Baechle | 2007-10-12 | 1 | -1/+1 |
* | [MIPS] SMP: Scatter __cpuinit over the code as needed. | Ralf Baechle | 2007-08-27 | 1 | -3/+3 |
* | [MIPS] VSMP: Fix initialization ordering bug. | Ralf Baechle | 2007-07-04 | 1 | -2/+2 |
* | [MIPS] Separate performance counter interrupts | Chris Dearman | 2007-06-14 | 1 | -6/+6 |
* | [MIPS] Define MIPS_CPU_IRQ_BASE in generic header | Atsushi Nemoto | 2007-02-06 | 1 | -5/+4 |
* | [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq | Atsushi Nemoto | 2006-11-30 | 1 | -0/+2 |
* | [MIPS] VSMP: Synchronize cp0 counters on bootup. | Ralf Baechle | 2006-10-31 | 1 | -0/+2 |
* | [MIPS] VSMP: Fix initialization ordering bug. | Ralf Baechle | 2006-10-31 | 1 | -69/+83 |
* | [MIPS] Complete fixes after removal of pt_regs argument to int handlers. | Ralf Baechle | 2006-10-08 | 1 | -8/+8 |
* | [MIPS] MT: Initialise all writable bits in Cause register to zero. | Chris Dearman | 2006-09-27 | 1 | -1/+1 |
* | [PATCH] irq-flags: MIPS: Use the new IRQF_ constants | Thomas Gleixner | 2006-07-02 | 1 | -2/+2 |
* | [MIPS] FPU affinity for MT ASE. | Ralf Baechle | 2006-04-19 | 1 | -0/+11 |
* | [MIPS] MT: Improved multithreading support. | Ralf Baechle | 2006-04-19 | 1 | -0/+349 |