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path: root/arch/mips/lantiq/irq.c (follow)
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* Merge tag 'mips_5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linuxLinus Torvalds2019-07-171-51/+126
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| * MIPS: lantiq: Add SMP support for lantiq interrupt controllerPetr Cvek2019-06-241-24/+106
| * MIPS: lantiq: Shorten register names, remove unused macrosPetr Cvek2019-06-241-18/+16
| * MIPS: lantiq: Fix bitfield maskingPetr Cvek2019-06-241-2/+3
| * MIPS: lantiq: Remove unused macrosPetr Cvek2019-06-241-4/+0
| * MIPS: lantiq: Fix attributes of of_device_id structurePetr Cvek2019-06-241-1/+1
| * MIPS: lantiq: Change variables to the same type as the sourcePetr Cvek2019-06-241-10/+10
| * MIPS: lantiq: Move macro directly to iomem functionPetr Cvek2019-06-241-10/+8
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-191-3/+1
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* MIPS: lantiq: Use CP0_LEGACY_COMPARE_IRQHauke Mehrtens2019-01-071-8/+1
* MIPS: lantiq: Fix IPI interrupt handlingHauke Mehrtens2019-01-071-63/+5
* MIPS: Use mips_gic_present() in place of gic_presentPaul Burton2017-09-041-4/+0
* MIPS: smp-mt: Use CPU interrupt controller IPI IRQ domain supportPaul Burton2017-04-121-52/+0
* MIPS: Lantiq: Fix cascaded IRQ setupFelix Fietkau2017-02-131-21/+17
* Merge branch '4.7-fixes' into mips-for-linux-nextRalf Baechle2016-08-031-1/+1
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| * MIPS: Lantiq: Register IRQ handler for virtual IRQ numberHauke Mehrtens2016-07-241-1/+1
| * MIPS: Lantiq: Fix eiu interrupt loading codeJohn Crispin2016-07-241-9/+10
* | MIPS: Lantiq: Fix build failureSudip Mukherjee2016-08-031-2/+2
* | MIPS: Lantiq: Use the real EXIN countJohn Crispin2016-07-241-3/+3
* | MIPS: Lantiq: Fix eiu interrupt loading codeJohn Crispin2016-07-241-9/+10
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* MIPS: Change my email addressJohn Crispin2016-05-131-1/+1
* MIPS: Lantiq: Fix check for return value of request_mem_region()Hauke Mehrtens2015-11-111-4/+4
* MIPS: Export get_c0_perfcount_int()Felix Fietkau2015-08-031-0/+1
* MIPS: SMP: Don't increment irq_count multiple times for call function IPIsAlex Smith2015-08-031-1/+1
* MIPS: lantiq: move eiu init after irq_domain registerJohn Crispin2014-11-241-24/+24
* MIPS: Add hook to get C0 performance counter interruptAndrew Bresticker2014-11-241-1/+7
* MIPS: MT: Remove SMTC supportRalf Baechle2014-05-241-2/+2
* MIPS: Panic messages should not end in \n.Ralf Baechle2013-10-291-1/+1
* MIPS: Delete __cpuinit/__CPUINIT usage from MIPS codePaul Gortmaker2013-07-151-1/+1
* MIPS: lantiq: rework external irq codeJohn Crispin2013-02-171-32/+73
* MIPS: Lantiq: Fix cp0_perfcount_irq mappingJohn Crispin2013-01-301-1/+1
* MIPS: lantiq: external irq sources are not loaded properlyJohn Crispin2012-08-231-1/+1
* MIPS: lantiq: dont register irq_chip for the irq cascadeJohn Crispin2012-08-231-0/+3
* MIPS: lantiq: timer irq can be different to 7John Crispin2012-08-231-3/+16
* MIPS: lantiq: split up IRQ IM rangesJohn Crispin2012-08-231-28/+32
* OF: MIPS: lantiq: implement irq_domain supportJohn Crispin2012-05-211-76/+102
* MIPS: lantiq: add ipi handlers to make vsmp workJohn Crispin2012-05-151-0/+60
* MIPS: lantiq: enable oprofile support on lantiq targetsJohn Crispin2012-05-151-0/+6
* MIPS: lantiq: clear all irqs properly on bootJohn Crispin2012-05-151-5/+6
* Merge branch 'next/generic' into mips-for-linux-nextRalf Baechle2012-01-111-1/+0
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| * MIPS: irq: Remove IRQF_DISABLEDYong Zhang2011-12-071-1/+0
* | MIPS: Fix up inconsistency in panic() string argument.Ralf Baechle2011-12-071-6/+6
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* MIPS: Lantiq: Fix external interrupt sourcesJohn Crispin2011-09-211-4/+2
* MIPS: Lantiq: Add initial support for Lantiq SoCsJohn Crispin2011-05-191-0/+326
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