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path: root/arch/mips/mm/c-r4k.c (follow)
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* MIPS: c-r4k: Avoid duplicate CPU_74K/CPU_1074K checksMaciej W. Rozycki2014-07-301-4/+4
* MIPS: Add minimal support for OCTEON3 to c-r4k.cDavid Daney2014-05-301-4/+44
* Merge branch 'wip-mips-pm' of https://github.com/paulburton/linux into mips-f...Ralf Baechle2014-05-291-0/+24
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| * MIPS: c-r4k: Add CPU PM callback for coherencyJames Hogan2014-05-021-0/+24
* | MIPS: MT: Remove SMTC supportRalf Baechle2014-05-241-2/+2
* | MIPS: c-r4k: Call R4600_HIT_CACHEOP_WAR_IMPL only for 32 byte cache lines.Ralf Baechle2014-05-231-1/+0
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* MIPS: Loongson: Add basic Loongson-3 CPU supportHuacai Chen2014-03-311-0/+59
* MIPS: Add support for the M5150 processorLeonid Yegoshin2014-03-261-0/+1
* MIPS: Extend DMA_MAYBE_COHERENT logic to DMA_NONCOHERENT useManuel Lauss2014-03-261-3/+3
* MIPS: mm: c-r4k: Flush scache to avoid cache aliasesLeonid Yegoshin2014-03-261-0/+11
* MIPS: mm: c-r4k: Add support for flushing user pages from cacheMarkos Chandras2014-03-261-2/+4
* MIPS: mm: c-r4k: Build EVA {d,i}cache flushing functionsLeonid Yegoshin2014-03-261-0/+47
* MIPS: Add cases for CPU_P5600James Hogan2014-03-261-0/+1
* MIPS: Coherent Processing System SMP implementationPaul Burton2014-03-261-1/+1
* MIPS: Add 1074K CPU support explicitly.Steven J. Hill2014-03-061-1/+2
* MIPS: mm: c-r4k: Detect instruction cache aliasesMarkos Chandras2014-03-061-3/+8
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2014-01-311-8/+18
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| * MIPS: Add support for interAptiv coresLeonid Yegoshin2014-01-221-0/+1
| * MIPS: Add support for the proAptiv coresLeonid Yegoshin2014-01-221-0/+1
| * MIPS: mm: c-r4k: Panic if IL or DL fields have a reserved valueMarkos Chandras2014-01-221-8/+16
* | MIPS: fix blast_icache32 on loongson2Aaro Koskinen2014-01-151-0/+7
* | MIPS: fix case mismatch in local_r4k_flush_icache_range()Huacai Chen2014-01-151-2/+2
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* MIPS: Loongson: Get rid of Loongson 2 #ifdefery all over arch/mips.Ralf Baechle2013-10-291-21/+31
* MIPS: Fix forgotten preempt_enable() when CPU has inclusive pcachesYoichi Yuasa2013-10-021-0/+2
* MIPS: 74K/1074K: Correct erratum workaround.Maciej W. Rozycki2013-09-181-8/+18
* MIPS: Cleanup CP0 PRId and CP1 FPIR register access masksMaciej W. Rozycki2013-09-181-5/+6
* MIPS: Optimize current_cpu_type() for better code.Ralf Baechle2013-09-171-7/+7
* MIPS: Fix accessing to per-cpu data when flushing the cacheRalf Baechle2013-09-171-0/+5
* MIPS: Delete __cpuinit/__CPUINIT usage from MIPS codePaul Gortmaker2013-07-151-17/+17
* Merge branch 'mti-next' of git://git.linux-mips.org/pub/scm/sjhill/linux-sjhi...Ralf Baechle2013-05-091-16/+8
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| * MIPS: Add option to disable software I/O coherency.Steven J. Hill2013-05-011-16/+8
* | Merge branch 'next/kvm' into mips-for-linux-nextRalf Baechle2013-05-091-2/+4
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| * MIPS: Export routines needed by the KVM module.Sanjay Lal2013-05-081-2/+4
* | MIPS: Fix ISA level which causes secondary cache init bypassing and moreDeng-Cheng Zhu2013-04-051-4/+2
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* Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-j...Ralf Baechle2013-02-211-0/+1
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| * MIPS: Add support for the M14KEc core.Steven J. Hill2013-02-171-0/+1
* | MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-13/+13
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* Merge branch 'mips-next' of http://dev.phrozen.org/githttp/mips-next into mip...Ralf Baechle2012-12-131-4/+4
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| * MIPS: Move processing of coherency kernel parameters earlierShane McDonald2012-11-091-4/+4
* | MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle2012-12-131-4/+0
* | MIPS: Fix potencial corruptionRalf Baechle2012-12-131-11/+0
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* MIPS: Add support for the 1074K core.Steven J. Hill2012-09-131-0/+21
* MIPS: Fix decoding of c0_config1 for MIPSxx caches with 32 ways per set.Douglas Leung2012-07-191-2/+2
* MIPS: Add support for the M14Kc core.Steven J. Hill2012-07-061-0/+1
* MIPS: Use board_cache_error_setup for r4k cache error handler setup.David Daney2012-05-161-4/+10
* Disintegrate asm/system.h for MIPSDavid Howells2012-03-281-1/+0
* mips: remove the second argument of k[un]map_atomic()Cong Wang2012-03-201-2/+2
* MIPS: Netlogic: XLP CPU support.Jayachandran C2011-12-071-0/+3
* MIPS: cache: Provide cache flush operations for XFSRalf Baechle2011-10-201-0/+35
* MIPS: Add SYNC after cacheflushKevin Cernekee2011-07-251-0/+4
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