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* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2016-01-241-1/+1
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| * MIPS: Fix some missing CONFIG_CPU_MIPSR6 #ifdefsHuacai Chen2016-01-241-1/+1
* | mips, thp: remove infrastructure for handling splitting PMDsKirill A. Shutemov2016-01-161-1/+0
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* MIPS: Extend hardware table walking support to MIPS64Paul Burton2015-11-111-1/+7
* MIPS: tlbex: Avoid placing software PTE bits in Entry* PFN fieldsPaul Burton2015-11-111-2/+45
* MIPS: tlbex: Share MIPS32 32 bit phys & MIPS64 64 bit phys codePaul Burton2015-11-111-11/+3
* MIPS: tlbex: Remove some RIXI redundancyPaul Burton2015-11-111-24/+10
* MIPS: tlbex: Stop open-coding build_convert_pte_to_entryloPaul Burton2015-11-111-8/+8
* MIPS: tlbex: Avoid unnecessary _PAGE_PRESENT shiftsJames Hogan2015-06-211-6/+17
* MIPS: tlbex: Fix broken offsets on r2 without XPAJames Hogan2015-06-211-4/+8
* MIPS: tlbex.c: Remove new instance of __cpuinitdata that crept back inPaul Gortmaker2015-06-211-1/+1
* Merge branch '4.0-fixes' into mips-for-linux-nextRalf Baechle2015-04-131-34/+81
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| * Revert "MIPS: Avoid pipeline stalls on some MIPS32R2 cores."Ralf Baechle2015-04-101-19/+2
| * MIPS: Add support for XPA.Steven J. Hill2015-03-191-13/+77
| * MIPS: Rearrange PTE bits into fixed positions.Steven J. Hill2015-03-181-2/+2
* | MIPS: Add R16000 detectionJoshua Kinard2015-04-011-0/+1
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* MIPS: mm: tlbex: Use cpu_has_mips_r2_exec_hazard for the EHB instructionLeonid Yegoshin2015-02-171-3/+3
* MIPS: Add cases for CPU_QEMU_GENERICLeonid Yegoshin2015-02-161-0/+1
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2014-12-121-9/+9
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| * MIPS: Replace MIPS-specific 64BIT_PHYS_ADDR with generic PHYS_ADDR_T_64BITRalf Baechle2014-11-241-9/+9
* | MIPS: tlbex: Fix potential HTW race on TLBL/M/S handlersLeonid Yegoshin2014-11-271-1/+9
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* MIPS: tlbex: Properly fix HUGE TLB Refill exception handlerDavid Daney2014-10-221-1/+5
* Merge branch '3.16-fixes' into mips-for-linux-nextRalf Baechle2014-08-021-0/+3
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| * MIPS: bugfix: missed cache flush of TLB refill handlerLeonid Yegoshin2014-08-011-0/+2
| * MIPS: tlbex: Fix a missing statement for HUGETLBHuacai Chen2014-07-301-0/+1
* | MIPS: Use dedicated exception handler if CPU supports RI/XI exceptionsLeonid Yegoshin2014-08-021-2/+2
* | MIPS: mm: Use the Hardware Page Table Walker if the core supports itMarkos Chandras2014-08-021-0/+91
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* MIPS: Add code for new system 'paravirt'David Daney2014-06-021-6/+2
* MIPS: Don't build fast TLB refill handler with 32-bit kernelsDavid Daney2014-05-301-2/+6
* MIPS: mm: Fix broken microMIPS kernel regression.Steven J. Hill2014-05-141-3/+4
* MIPS: Loongson: Add basic Loongson-3 CPU supportHuacai Chen2014-03-311-0/+1
* MIPS: Use current_cpu_type() instead of c->cputypeWu Zhangjin2014-03-311-1/+1
* MIPS: Add support for the M5150 processorLeonid Yegoshin2014-03-261-0/+1
* MIPS: Add cases for CPU_P5600James Hogan2014-03-261-0/+1
* MIPS: Add 1074K CPU support explicitly.Steven J. Hill2014-03-061-0/+1
* mips: delete non-required instances of include <linux/init.h>Paul Gortmaker2014-01-241-1/+0
* MIPS: Add support for the proAptiv coresLeonid Yegoshin2014-01-221-0/+1
* MIPS: Loongson: Get rid of Loongson 2 #ifdefery all over arch/mips.Ralf Baechle2013-10-291-82/+87
* MIPS: mm: Use scratch for PGD when !CONFIG_MIPS_PGD_C0_CONTEXTJayachandran C2013-10-291-33/+57
* MIPS: Move definition of SMP processor id register to header fileJayachandran C2013-10-291-50/+6
* MIPS: Optimize current_cpu_type() for better code.Ralf Baechle2013-09-171-0/+1
* MIPS: Generate OCTEON3 TLB handlers with the same features as OCTEON2.David Daney2013-08-261-0/+2
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2013-07-201-2/+2
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| * MIPS: tlbex: fix broken build in v3.11-rc1Aaro Koskinen2013-07-191-1/+1
| * MIPS: tlbex: Fix typo in r3000 tlb store handlerTony Wu2013-07-191-1/+1
* | MIPS: Delete __cpuinit/__CPUINIT usage from MIPS codePaul Gortmaker2013-07-151-77/+67
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* Merge branch '3.10-fixes' into mips-for-linux-nextRalf Baechle2013-07-121-14/+42
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| * MIPS: tlbex: Fix size of area to be flushed.Ralf Baechle2013-06-271-1/+1
| * MIPS: Flush TLB handlers directly after writing themJonas Gorski2013-06-251-14/+16
| * MIPS: Fix TLBR-use hazards for R2 cores in the TLB reload handlersRalf Baechle2013-06-211-0/+26
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