Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | riscv: errata: Add Andes alternative ports | Lad Prabhakar | 2023-09-01 | 1 | -0/+1 |
* | riscv: Fix relocatable kernels with early alternatives using -fno-pie | Alexandre Ghiti | 2023-05-31 | 1 | -0/+4 |
* | riscv: add memory-type errata for T-Head | Heiko Stuebner | 2022-05-12 | 1 | -0/+1 |
* | riscv: integrate alternatives better into the main architecture | Heiko Stuebner | 2022-05-12 | 1 | -1/+0 |
* | riscv: sifive: Add SiFive alternative ports | Vincent Chen | 2021-04-26 | 1 | -0/+1 |
* | riscv: Introduce alternative mechanism to apply errata solution | Vincent Chen | 2021-04-26 | 1 | -0/+1 |