linux - linux

	Commit message (Expand)	Author	Age	Files	Lines
*	riscv: errata: sifive: Use SYM_*() assembly macros	Jisheng Zhang	2024-09-15	1	-4/+4
*	riscv: Extend cpufeature.c to detect vendor extensions	Charlie Jenkins	2024-07-23	1	-0/+3
*	riscv: Avoid TLB flush loops when affected by SiFive CIP-1200	Samuel Holland	2024-04-29	1	-0/+5
*	RISC-V: fix sifive and thead section mismatches in errata	Randy Dunlap	2023-04-29	1	-5/+3
*	Merge tag 'riscv-for-linus-6.4-mw1' of git://git.kernel.org/pub/scm/linux/ker...	Linus Torvalds	2023-04-29	1	-4/+4
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\| *	riscv: alternatives: Rename errata_id to patch_id	Andrew Jones	2023-03-15	1	-3/+3
\| *	riscv: alternatives: Remove unnecessary define and unused struct	Andrew Jones	2023-03-15	1	-1/+1
* \|	RISC-V: fix taking the text_mutex twice during sifive errata patching	Conor Dooley	2023-03-07	1	-1/+1
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*	RISC-V: take text_mutex during alternative patching	Conor Dooley	2023-02-22	1	-0/+3
*	riscv: switch to relative alternative entries	Jisheng Zhang	2023-02-01	1	-1/+2
*	riscv: don't warn for sifive erratas in modules	Heiko Stuebner	2022-07-08	1	-1/+2
*	riscv: add memory-type errata for T-Head	Heiko Stuebner	2022-05-12	1	-1/+6
*	riscv: implement module alternatives	Heiko Stuebner	2022-05-12	1	-5/+9
*	riscv: allow different stages with alternatives	Heiko Stuebner	2022-05-12	1	-1/+2
*	riscv: skip errata_cip_453.o if CONFIG_ERRATA_SIFIVE_CIP_453 is disabled	Vincent	2021-06-02	1	-1/+1
*	riscv: sifive: Apply errata "cip-1200" patch	Vincent Chen	2021-04-26	1	-0/+18
*	riscv: sifive: Apply errata "cip-453" patch	Vincent Chen	2021-04-26	3	-0/+59
*	riscv: sifive: Add SiFive alternative ports	Vincent Chen	2021-04-26	2	-0/+69