summaryrefslogtreecommitdiffstats
path: root/arch/riscv/include/asm/mmu_context.h (follow)
Commit message (Expand)AuthorAgeFilesLines
* riscv: add ASID-based tlbflushing methodsGuo Ren2021-07-011-0/+2
* RISC-V: Implement ASID allocatorAnup Patel2021-02-191-0/+10
* riscv: use asm-generic/mmu_context.h for no-op implementationsNicholas Piggin2020-10-271-20/+2
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286Thomas Gleixner2019-06-051-9/+1
* riscv: move switch_mm to its own fileGary Guo2019-05-171-52/+2
* RISC-V: Access CSRs using CSR numbersAnup Patel2019-05-171-6/+1
* riscv: inline set_pgdir into its only callerChristoph Hellwig2018-01-311-11/+6
* riscv: rename sptbr to satpChristoph Hellwig2018-01-311-1/+6
* riscv: remove the unused current_pgdir functionChristoph Hellwig2018-01-311-5/+0
* RISC-V: Fixes for clean allmodconfig buildPalmer Dabbelt2017-12-011-0/+1
|\
| * RISC-V: Add missing includeOlof Johansson2017-11-301-0/+1
* | RISC-V: Flush I$ when making a dirty page executableAndrew Waterman2017-11-301-0/+44
|/
* RISC-V: Paging and MMUPalmer Dabbelt2017-09-271-0/+69