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Commit message (
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Author
Age
Files
Lines
*
riscv: Constify sbi_ipi_ops
Jisheng Zhang
2021-04-26
1
-2
/
+2
*
RISC-V: Add mechanism to provide custom IPI operations
Anup Patel
2020-08-20
1
-0
/
+19
*
RISC-V: Fix build warning for smpboot.c
Atish Patra
2020-08-05
1
-0
/
+3
*
RISC-V: self-contained IPI handling routine
Anup Patel
2020-06-10
1
-0
/
+3
*
RISC-V: Support cpu hotplug
Atish Patra
2020-03-31
1
-0
/
+17
*
RISC-V: Implement new SBI v0.2 extensions
Atish Patra
2020-03-31
1
-0
/
+7
*
riscv: cleanup riscv_cpuid_to_hartid_mask
Christoph Hellwig
2019-09-05
1
-6
/
+0
*
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
Thomas Gleixner
2019-06-05
1
-9
/
+1
*
RISC-V: Move cpuid to hartid mapping to SMP.
Atish Patra
2019-03-04
1
-5
/
+13
*
RISC-V: Show IPI stats
Anup Patel
2018-10-23
1
-0
/
+9
*
RISC-V: Add logical CPU indexing for RISC-V
Atish Patra
2018-10-23
1
-1
/
+23
*
RISC-V: Provide a cleaner raw_smp_processor_id()
Palmer Dabbelt
2018-10-23
1
-10
/
+4
*
clocksource: new RISC-V SBI timer driver
Palmer Dabbelt
2018-08-13
1
-3
/
+0
*
RISC-V: simplify software interrupt / IPI code
Christoph Hellwig
2018-08-13
1
-3
/
+0
*
RISC-V: Init and Halt Code
Palmer Dabbelt
2017-09-27
1
-0
/
+52