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* RISC-V: Fix the rv32i kernel buildPalmer Dabbelt2018-07-044-13/+21
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| * RISC-V: Change variable type for 32-bit compatibleZong Li2018-07-041-11/+11
| * RISC-V: Add definiion of extract symbol's index and type for 32-bitZong Li2018-07-041-2/+7
| * RISC-V: Select GENERIC_UCMPDI2 on RV32IZong Li2018-07-041-0/+1
| * RISC-V: Add conditional macro for zone of DMA32Zong Li2018-07-041-0/+2
* | RISC-V: Fix PTRACE_SETREGSET bug.Jim Wilson2018-07-041-1/+1
* | RISC-V: Don't include irq-riscv-intc.hPalmer Dabbelt2018-07-041-4/+0
* | riscv: remove unnecessary of_platform_populate callRob Herring2018-07-041-5/+0
* | RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocationsAndreas Schwab2018-07-041-2/+2
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* Merge tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm...Linus Torvalds2018-06-1515-14/+626
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| * RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfigPalmer Dabbelt2018-06-111-0/+1
| * RISC-V: Make our port sparse-cleanPalmer Dabbelt2018-06-116-9/+14
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| | * riscv: split the declaration of __copy_userLuc Van Oostenryck2018-06-093-6/+11
| | * riscv: no __user for probe_kernel_address()Luc Van Oostenryck2018-06-071-1/+1
| | * riscv: use NULL instead of a plain 0Luc Van Oostenryck2018-06-072-2/+2
| * | RISC-V: Handle R_RISCV_32 in modulesAndreas Schwab2018-06-111-0/+12
| * | riscv/ftrace: Export _mcount when DYNAMIC_FTRACE isn't setAlan Kao2018-06-111-1/+1
| * | riscv: add riscv-specific predefines to CHECKFLAGSLuc Van Oostenryck2018-06-111-0/+3
| * | RISC-V: Preliminary Perf SupportPalmer Dabbelt2018-06-045-0/+586
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| | * | perf: riscv: preliminary RISC-V supportAlan Kao2018-06-045-0/+586
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| * / riscv: Fix the bug in memory access fixup codeAlan Kao2018-06-041-4/+9
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* | Merge tag 'mips_4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/l...Linus Torvalds2018-06-121-3/+3
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| * | lib: Rename compiler intrinsic selects to GENERIC_LIB_*Matt Redfearn2018-04-231-3/+3
* | | Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds2018-06-081-1/+0
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| * | | drivers: base: cacheinfo: setup DT cache properties earlyJeremy Linton2018-05-171-1/+0
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* | | mm: introduce ARCH_HAS_PTE_SPECIALLaurent Dufour2018-06-082-3/+1
* | | Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds2018-06-051-14/+2
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| * | | signal/riscv: Replace do_trap_siginfo with force_sig_faultEric W. Biederman2018-04-251-8/+2
| * | | signal/riscv: Use force_sig_fault where appropriateEric W. Biederman2018-04-251-8/+1
| * | | signal: Ensure every siginfo we send has all bits initializedEric W. Biederman2018-04-251-0/+1
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* | | riscv: add swiotlb supportChristoph Hellwig2018-05-193-0/+18
* | | riscv: only enable ZONE_DMA32 for 64-bitChristoph Hellwig2018-05-191-1/+1
* | | riscv: simplify Kconfig magic for 32-bit vs 64-bit kernelsChristoph Hellwig2018-05-191-25/+6
* | | arch: define the ARCH_DMA_ADDR_T_64BIT config symbol in lib/KconfigChristoph Hellwig2018-05-091-3/+0
* | | arch: remove the ARCH_PHYS_ADDR_T_64BIT config symbolChristoph Hellwig2018-05-091-4/+2
* | | dma-debug: remove CONFIG_HAVE_DMA_API_DEBUGChristoph Hellwig2018-05-081-1/+0
* | | PCI: remove PCI_DMA_BUS_IS_PHYSChristoph Hellwig2018-05-071-3/+0
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* | RISC-V: build vdso-dummy.o with -no-pieAurelien Jarno2018-04-241-1/+1
* | riscv: there is no <asm/handle_irq.h>Christoph Hellwig2018-04-241-1/+0
* | riscv: select DMA_DIRECT_OPS instead of redefining itChristoph Hellwig2018-04-241-3/+1
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* Merge tag 'riscv-for-linus-4.17-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2018-04-0519-255/+1598
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| * RISC-V: Rename CONFIG_CMDLINE_OVERRIDE to CONFIG_CMDLINE_FORCEPalmer Dabbelt2018-04-031-2/+2
| * RISC-V: Fixes to module loadingPalmer Dabbelt2018-04-039-6/+470
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| | * RISC-V: Add definition of relocation typesZong Li2018-04-031-0/+7
| | * RISC-V: Enable module support in defconfigZong Li2018-04-031-0/+2
| | * RISC-V: Support SUB32 relocation type in kernel moduleZong Li2018-04-031-0/+8
| | * RISC-V: Support ADD32 relocation type in kernel moduleZong Li2018-04-031-0/+8
| | * RISC-V: Support ALIGN relocation type in kernel moduleZong Li2018-04-031-0/+10
| | * RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewqZong Li2018-04-031-0/+35
| | * RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel moduleZong Li2018-04-031-0/+42
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