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* perf/x86/intel/pt: Fix topa_entry base lengthMarco Cavenati2024-07-041-2/+2
* perf/x86/intel/pt: Prevent redundant WRMSRsAlexander Shishkin2019-11-131-3/+7
* perf/x86/intel/pt: Opportunistically use single range output modeAlexander Shishkin2019-11-131-0/+2
* perf/x86/intel/pt: Get rid of reverse lookup table for ToPAAlexander Shishkin2019-08-261-4/+6
* perf/x86/intel/pt: Clean up ToPA allocation pathAlexander Shishkin2019-08-261-2/+0
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288Thomas Gleixner2019-06-051-9/+1
* perf/x86/intel/pt: Export pt_cap_get()Chao Peng2018-12-211-21/+0
* perf/x86/intel/pt: Move Intel PT MSRs bit defines to global headerChao Peng2018-12-211-37/+0
* perf/x86/intel/pt: Allow the disabling of branch tracingAlexander Shishkin2017-03-301-0/+1
* perf/core: Keep AUX flags in the output handleWill Deacon2017-03-161-1/+0
* perf/x86/intel/pt: Add support for PTWRITE and power event tracingAlexander Shishkin2016-09-201-0/+5
* perf/x86/intel/pt: Export CPU frequency ratios needed by PT decodersAlexander Shishkin2016-05-051-0/+6
* perf/x86/intel/pt: Add support for address range filtering in PTAlexander Shishkin2016-05-051-0/+26
* perf/x86/intel/pt: Add IP filtering register/CPUID bitsAlexander Shishkin2016-05-051-0/+12
* perf/x86/intel/pt: Move PT specific MSR bit definitions to a private headerAlexander Shishkin2016-05-051-0/+24
* perf/x86/intel/pt: Don't die on VMXONAlexander Shishkin2016-04-281-0/+3
* perf/x86: Move perf_event_intel_pt.[ch] ...... => x86/events/intel/pt.[ch]Borislav Petkov2016-02-171-0/+116