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perf_event.h
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Author
Age
Files
Lines
*
perf/x86/intel/lbr: Support LBR format V7
Peter Zijlstra (Intel)
2022-01-18
1
-1
/
+9
*
x86: perf: Move RDPMC event flag to a common definition
Rob Herring
2021-12-14
1
-1
/
+1
*
Merge tag 'net-next-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/gi...
Linus Torvalds
2021-11-02
1
-0
/
+19
|
\
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*
perf: Enable branch record for software events
Song Liu
2021-09-13
1
-0
/
+19
*
|
Merge tag 'x86-fpu-2021-11-01' of git://git.kernel.org/pub/scm/linux/kernel/g...
Linus Torvalds
2021-11-01
1
-0
/
+1
|
\
\
|
*
|
x86/pkru: Remove useless include
Thomas Gleixner
2021-10-20
1
-0
/
+1
|
|
/
*
/
perf/x86: Add new event for AUX output counter index
Adrian Hunter
2021-10-15
1
-0
/
+1
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/
*
perf/x86/intel: Apply mid ACK for small core
Kan Liang
2021-08-06
1
-0
/
+15
*
perf/x86/amd: Don't touch the AMD64_EVENTSEL_HOSTONLY bit inside the guest
Like Xu
2021-08-04
1
-1
/
+2
*
Merge tag 'perf-core-2021-06-28' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds
2021-06-28
1
-0
/
+1
|
\
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*
perf/x86: Reset the dirty counter to prevent the leak for an RDPMC task
Kan Liang
2021-06-17
1
-0
/
+1
*
|
perf/x86/lbr: Remove cpuc->lbr_xsave allocation from atomic context
Like Xu
2021-05-18
1
-0
/
+6
|
/
*
perf/x86/intel: Add Alder Lake Hybrid support
Kan Liang
2021-04-19
1
-0
/
+7
*
perf/x86: Support filter_match callback
Kan Liang
2021-04-19
1
-0
/
+1
*
perf/x86: Add structures for the attributes of Hybrid PMUs
Kan Liang
2021-04-19
1
-0
/
+19
*
perf/x86: Register hybrid PMUs
Kan Liang
2021-04-19
1
-0
/
+14
*
perf/x86: Factor out x86_pmu_show_pmu_cap
Kan Liang
2021-04-19
1
-0
/
+3
*
perf/x86: Hybrid PMU support for extra_regs
Kan Liang
2021-04-19
1
-0
/
+1
*
perf/x86: Hybrid PMU support for event constraints
Kan Liang
2021-04-19
1
-0
/
+2
*
perf/x86: Hybrid PMU support for hardware cache event
Kan Liang
2021-04-19
1
-0
/
+9
*
perf/x86: Hybrid PMU support for unconstrained
Kan Liang
2021-04-19
1
-0
/
+11
*
perf/x86: Hybrid PMU support for counters
Kan Liang
2021-04-19
1
-0
/
+4
*
perf/x86: Hybrid PMU support for intel_ctrl
Kan Liang
2021-04-19
1
-2
/
+8
*
perf/x86/intel: Hybrid PMU support for perf capabilities
Kan Liang
2021-04-19
1
-0
/
+33
*
perf/x86: Track pmu in per-CPU cpu_hw_events
Kan Liang
2021-04-19
1
-1
/
+3
*
perf/x86: Move cpuc->running into P4 specific code
Kan Liang
2021-04-16
1
-1
/
+0
*
perf/x86/intel: Support CPUID 10.ECX to disable fixed counters
Kan Liang
2021-02-01
1
-0
/
+5
*
perf/x86/intel: Add perf core PMU support for Sapphire Rapids
Kan Liang
2021-02-01
1
-1
/
+11
*
perf/x86/intel: Filter unsupported Topdown metrics event
Kan Liang
2021-02-01
1
-0
/
+1
*
perf/intel: Remove Perfmon-v4 counter_freezing support
Peter Zijlstra
2021-01-27
1
-2
/
+1
*
Merge remote-tracking branch 'origin/master' into perf/core
Peter Zijlstra
2020-11-26
1
-1
/
+2
|
\
|
*
perf/x86/intel: Make anythread filter support conditional
Stephane Eranian
2020-11-09
1
-0
/
+1
|
*
perf/x86: Reduce stack usage for x86_pmu::drain_pebs()
Peter Zijlstra
2020-11-09
1
-1
/
+1
*
|
perf/core: Add support for PERF_SAMPLE_CODE_PAGE_SIZE
Stephane Eranian
2020-10-29
1
-1
/
+1
|
/
*
perf/x86: Fix n_metric for cancelled txn
Peter Zijlstra
2020-10-06
1
-0
/
+1
*
perf/x86: Fix n_pair for cancelled txn
Peter Zijlstra
2020-10-06
1
-0
/
+1
*
perf/x86/intel: Support TopDown metrics on Ice Lake
Kan Liang
2020-08-18
1
-0
/
+13
*
perf/x86/intel: Generic support for hardware TopDown metrics
Kan Liang
2020-08-18
1
-0
/
+37
*
perf/x86/intel: Fix the name of perf METRICS
Kan Liang
2020-08-18
1
-1
/
+1
*
perf/x86/intel/lbr: Support XSAVES for arch LBR read
Kan Liang
2020-07-08
1
-0
/
+7
*
perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switch
Kan Liang
2020-07-08
1
-0
/
+21
*
perf/x86/intel/lbr: Support Architectural LBR
Kan Liang
2020-07-08
1
-0
/
+10
*
perf/x86/intel/lbr: Factor out rdlbr_all() and wrlbr_all()
Kan Liang
2020-07-08
1
-1
/
+1
*
perf/x86/intel/lbr: Unify the stored format of LBR information
Kan Liang
2020-07-08
1
-4
/
+2
*
perf/x86/intel/lbr: Support LBR_CTL
Kan Liang
2020-07-08
1
-3
/
+12
*
perf/x86: Expose CPUID enumeration bits for arch LBR
Kan Liang
2020-07-08
1
-0
/
+13
*
perf/x86/intel/lbr: Use dynamic data structure for task_ctx
Kan Liang
2020-07-08
1
-1
/
+6
*
perf/x86/intel/lbr: Factor out a new struct for generic optimization
Kan Liang
2020-07-08
1
-3
/
+7
*
perf/x86/intel/lbr: Add the function pointers for LBR save and restore
Kan Liang
2020-07-08
1
-0
/
+6
*
perf/x86/intel/lbr: Add a function pointer for LBR read
Kan Liang
2020-07-08
1
-0
/
+5
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