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path: root/arch/x86/include/asm/tlbflush.h (follow)
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* x86/mm/64: Flush global TLB on boot and AP bringupJoerg Roedel2021-12-061-0/+5
* x86/mm: Refactor cond_ibpb() to support other use casesBalbir Singh2021-07-281-1/+1
* x86/mm/tlb: Privatize cpu_tlbstateNadav Amit2021-03-061-18/+21
* x86/mm/tlb: Flush remote and local TLBs concurrentlyNadav Amit2021-03-061-2/+2
* x86/mm/tlb: Unify flush_tlb_func_local() and flush_tlb_func_remote()Nadav Amit2021-03-061-2/+3
* x86/tlb: Restrict access to tlbstateThomas Gleixner2020-04-261-47/+49
* x86/tlb: Move PCID helpers where they are usedThomas Gleixner2020-04-261-127/+6
* x86/tlb: Uninline nmi_uaccess_okay()Thomas Gleixner2020-04-261-32/+1
* x86/tlb: Move cr4_set_bits_and_update_boot() to the usage siteThomas Gleixner2020-04-261-14/+0
* x86/tlb: Move paravirt_tlb_remove_table() to the usage siteThomas Gleixner2020-04-261-5/+0
* x86/tlb: Move __flush_tlb_all() out of lineThomas Gleixner2020-04-261-22/+1
* x86/tlb: Move flush_tlb_others() out of lineThomas Gleixner2020-04-261-6/+4
* x86/tlb: Move __flush_tlb_one_kernel() out of lineThomas Gleixner2020-04-261-40/+1
* x86/tlb: Move __flush_tlb_one_user() out of lineThomas Gleixner2020-04-261-51/+2
* x86/tlb: Move __flush_tlb_global() out of lineThomas Gleixner2020-04-261-36/+2
* x86/tlb: Move __flush_tlb() out of lineThomas Gleixner2020-04-261-24/+5
* x86/cpu: Uninline CR4 accessorsThomas Gleixner2020-04-241-31/+5
* x86/mm: Avoid redundant interrupt disable in load_mm_cr4()Jan Kiszka2019-07-241-7/+23
* Merge branch 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2019-05-071-0/+2
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| * mm/tlb: Provide default nmi_uaccess_okay()Nadav Amit2019-04-301-0/+2
* | x86/mm/tlb: Define LOADED_MM_SWITCHING with pointer-sized numberJann Horn2019-03-291-1/+1
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* x86/speculation: Prepare for conditional IBPB in switch_mm()Thomas Gleixner2018-11-281-2/+6
* x86/mm/pat: Disable preemption around __flush_tlb_all()Sebastian Andrzej Siewior2018-10-291-0/+6
* x86/mm/tlb: Add freed_tables element to flush_tlb_infoRik van Riel2018-10-091-0/+1
* x86/mm/tlb: Add freed_tables argument to flush_tlb_mm_rangeRik van Riel2018-10-091-4/+6
* x86/mm/tlb: Always use lazy TLB modeRik van Riel2018-10-091-16/+0
* x86/mm: Page size aware flush_tlb_mm_range()Peter Zijlstra2018-10-091-4/+8
* x86/nmi: Fix NMI uaccess race against CR3 switchingAndy Lutomirski2018-08-311-0/+40
* x86/mm: Only use tlb_remove_table() for paravirtPeter Zijlstra2018-08-231-0/+3
* x86/mm/tlb: Revert the recent lazy TLB patchesPeter Zijlstra2018-08-231-5/+16
* x86/mm/tlb: Always use lazy TLB modeRik van Riel2018-07-171-16/+0
* x86/mm/tlb: Leave lazy TLB mode at page table free timeRik van Riel2018-07-171-0/+5
* x86/mm: Fix bogus warning during EFI bootup, use boot_cpu_has() instead of th...Sai Praneeth2018-04-051-1/+6
* x86/mm: Rename flush_tlb_single() and flush_tlb_one() to __flush_tlb_one_[use...Andy Lutomirski2018-02-151-7/+20
* x86/speculation: Use Indirect Branch Prediction Barrier in context switchTim Chen2018-01-301-0/+2
* Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2018-01-141-3/+3
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| * x86/pti: Fix !PCID and sanitize definesThomas Gleixner2018-01-141-3/+3
* | Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2017-12-311-6/+8
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| * x86/mm: Remove preempt_disable/enable() from __native_flush_tlb()Thomas Gleixner2017-12-311-6/+8
* | Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2017-12-301-31/+171
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| * x86/mm: Clarify the whole ASID/kernel PCID/user PCID namingPeter Zijlstra2017-12-231-12/+43
| * x86/mm: Use INVPCID for __native_flush_tlb_single()Dave Hansen2017-12-231-1/+22
| * x86/mm: Use/Fix PCID to optimize user/kernel switchesPeter Zijlstra2017-12-231-12/+79
| * x86/mm: Allow flushing for future ASID switchesDave Hansen2017-12-231-8/+29
* | Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2017-12-231-64/+72
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| * x86/mm: Create asm/invpcid.hPeter Zijlstra2017-12-221-48/+1
| * x86/mm: Put MMU to hardware ASID translation in one placeDave Hansen2017-12-221-11/+18
| * x86/mm: Remove hard-coded ASID limit checksDave Hansen2017-12-221-2/+18
| * x86/mm: Move the CR3 construction functions to tlbflush.hDave Hansen2017-12-221-0/+26
| * x86/mm: Add comments to clarify which TLB-flush functions are supposed to flu...Peter Zijlstra2017-12-221-2/+21
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