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path: root/arch/x86/kernel/apic/msi.c (follow)
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* x86/hpet: Move MSI support into hpet.cDavid Woodhouse2020-10-281-111/+0
* x86/apic: Always provide irq_compose_msi_msg() method for vector domainDavid Woodhouse2020-10-281-37/+0
* x86/apic: Cleanup destination modeThomas Gleixner2020-10-281-3/+3
* x86/msi: Only use high bits of MSI address for DMAR unitDavid Woodhouse2020-10-281-6/+27
* x86/apic/msi: Unbreak DMAR and HPET MSIThomas Gleixner2020-09-271-0/+2
* x86/irq: Cleanup the arch_*_msi_irqs() leftoversThomas Gleixner2020-09-161-22/+0
* x86/pci: Set default irq domain in pcibios_add_device()Thomas Gleixner2020-09-161-1/+1
* x86/irq: Initialize PCI/MSI domain at PCI init timeThomas Gleixner2020-09-161-12/+19
* x86/msi: Use generic MSI domain opsThomas Gleixner2020-09-161-29/+1
* x86/msi: Consolidate MSI allocationThomas Gleixner2020-09-161-4/+3
* PCI/MSI: Rework pci_msi_domain_calc_hwirq()Thomas Gleixner2020-09-161-1/+1
* x86/irq: Consolidate DMAR irq allocationThomas Gleixner2020-09-161-5/+5
* x86/msi: Consolidate HPET allocationThomas Gleixner2020-09-161-7/+7
* iommu/irq_remapping: Consolidate irq domain lookupThomas Gleixner2020-09-161-1/+1
* x86/irq: Add allocation type for parent domain retrievalThomas Gleixner2020-09-161-1/+1
* x86_irq_Rename_X86_IRQ_ALLOC_TYPE_MSI_to_reflect_PCI_dependencyThomas Gleixner2020-09-161-3/+3
* x86/msi: Remove pointless vcpu_affinity callbackThomas Gleixner2020-09-161-1/+0
* x86/msi: Move compose message callback where it belongsThomas Gleixner2020-09-161-9/+3
* genirq/chip: Use the first chip in irq_chip_compose_msi_msg()Thomas Gleixner2020-09-161-2/+5
* irqdomain/treewide: Keep firmware node unconditionally allocatedThomas Gleixner2020-07-141-6/+12
* x86/entry: Use idtentry for interruptsThomas Gleixner2020-06-111-1/+2
* x86/apic/msi: Plug non-maskable MSI affinity raceThomas Gleixner2020-02-011-3/+125
* x86/hpet: Move clockevents into channelsThomas Gleixner2019-06-281-2/+2
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-191-4/+1
* x86: Don't include linux/irq.h from asm/hardirq.hNicolai Stange2018-08-051-0/+1
* x86/apic: Switch all APICs to Fixed delivery modeThomas Gleixner2017-12-291-6/+2
* x86/msi: Create named irq domainsThomas Gleixner2017-06-221-9/+33
* x86/msi: Remove unused remap irq domain interfaceThomas Gleixner2017-06-221-6/+0
* x86/msi: Provide new iommu irqdomain interfaceThomas Gleixner2017-06-221-0/+15
* PCI/MSI: Remove pci_msi_domain_{alloc,free}_irqs()Christoph Hellwig2017-02-101-1/+1
* x86: Apply more __ro_after_init and constKees Cook2016-08-101-1/+1
* x86/irq: Export functions to allow MSI domains in modulesJake Oshins2015-12-201-3/+5
* x86/irq: Use accessor irq_data_get_irq_handler_data()Jiang Liu2015-07-131-1/+1
* x86/irq/msi: Implement irq_set_vcpu_affinity for remapped MSI irqsFeng Wu2015-05-191-0/+1
* x86/hpet: Pass proper pointer to irq_alloc_infoSergey Senozhatsky2015-05-131-1/+1
* x86/irq: Move irqdomain specific code into asm/irqdomain.hJiang Liu2015-04-241-1/+1
* x86/irq: Simplify MSI/DMAR/HPET implementation by using common codeJiang Liu2015-04-241-138/+54
* x86/irq: Implement irq_chip.irq_write_msi_msg for MSI/DMAR/HPET irq_chipsJiang Liu2015-04-241-0/+12
* x86/MSI: Replace msi_update_msg() with irq_chip_compose_msi_msg()Jiang Liu2015-04-241-17/+2
* x86/MSI: Simplify the way to deal with remapped MSI interruptsJiang Liu2015-04-241-4/+24
* x86/irq: Normalize x86 irq_chip nameJiang Liu2015-04-241-2/+2
* x86/irq: Use hierarchical irqdomain to manage DMAR interruptsJiang Liu2015-04-241-57/+96
* iommu/vt-d: Refine the interfaces to create IRQ for DMAR unitJiang Liu2015-04-241-11/+13
* x86/MSI: Clean up unused MSI related code and interfacesJiang Liu2015-04-241-51/+4
* x86/irq: Directly call native_compose_msi_msg() for DMAR IRQJiang Liu2015-04-241-4/+2
* x86/MSI: Use hierarchical irqdomains to manage MSI interruptsJiang Liu2015-04-241-66/+75
* x86/hpet: Enhance HPET IRQ to support hierarchical irqdomainsJiang Liu2015-04-241-19/+147
* x86/dmar: Use new irqdomain interfaces to allocate/free IRQJiang Liu2015-04-241-0/+10
* x86/MSI: Use new irqdomain interfaces to allocate/free IRQJiang Liu2015-04-241-8/+6
* x86, irq: Use helpers to access irq_cfg data structure associated with IRQJiang Liu2014-12-161-3/+3
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