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* Merge tag 'x86-apic-2020-12-14' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2020-12-1513-463/+444
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| * x86/ioapic: Cleanup the timer_works() irqflags messThomas Gleixner2020-12-101-16/+6
| * x86/ioapic: Correct the PCI/ISA trigger type selectionThomas Gleixner2020-11-101-2/+2
| * x86/ioapic: Use I/O-APIC ID for finding irqdomain, not indexDavid Woodhouse2020-11-041-2/+2
| * x86/apic: Support 15 bits of APIC ID in MSI where availableDavid Woodhouse2020-10-281-2/+24
| * x86/ioapic: Handle Extended Destination ID field in RTEDavid Woodhouse2020-10-281-5/+15
| * x86/ioapic: Use irq_find_matching_fwspec() to find remapping irqdomainDavid Woodhouse2020-10-281-12/+13
| * x86/apic: Add select() method on vector irqdomainDavid Woodhouse2020-10-281-0/+43
| * x86/ioapic: Generate RTE directly from parent irqchip's MSI messageDavid Woodhouse2020-10-281-31/+72
| * x86/ioapic: Cleanup IO/APIC route entry structsThomas Gleixner2020-10-281-79/+65
| * x86/io_apic: Cleanup trigger/polarity helpersThomas Gleixner2020-10-281-129/+115
| * x86/msi: Provide msi message shadow structsThomas Gleixner2020-10-281-16/+19
| * x86/hpet: Move MSI support into hpet.cDavid Woodhouse2020-10-281-111/+0
| * x86/apic: Always provide irq_compose_msi_msg() method for vector domainDavid Woodhouse2020-10-283-37/+38
| * x86/apic: Cleanup destination modeThomas Gleixner2020-10-2811-19/+15
| * x86/apic: Get rid of apic:: Dest_logicalThomas Gleixner2020-10-289-31/+11
| * x86/apic: Replace pointless apic:: Dest_logical usageThomas Gleixner2020-10-283-5/+5
| * x86/apic: Cleanup delivery mode definesThomas Gleixner2020-10-289-17/+18
| * x86/apic/uv: Fix inconsistent destination modeThomas Gleixner2020-10-281-1/+1
| * x86/msi: Only use high bits of MSI address for DMAR unitDavid Woodhouse2020-10-281-6/+27
| * x86/apic: Fix x2apic enablement without interrupt remappingDavid Woodhouse2020-10-282-6/+17
* | Merge tag 'x86_platform_for_v5.11' of git://git.kernel.org/pub/scm/linux/kern...Linus Torvalds2020-12-141-1/+22
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| * | x86/platform/uv: Add deprecated messages to /proc info leavesMike Travis2020-12-071-1/+10
| * | x86/platform/uv: Add kernel interfaces for obtaining system infoMike Travis2020-12-071-0/+12
* | | x86/apic/vector: Fix ordering in vector assignmentThomas Gleixner2020-12-101-10/+14
* | | x86/platform/uv: Fix UV4 hub revision adjustmentMike Travis2020-12-031-1/+1
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* | x86/platform/uv: Fix copied UV5 output archtypeMike Travis2020-11-131-3/+3
* | x86/platform/uv: Recognize UV5 hubless system identifierMike Travis2020-11-071-3/+10
* | x86/platform/uv: Remove spaces from OEM IDsMike Travis2020-11-071-0/+3
* | x86/platform/uv: Fix missing OEM_TABLE_IDMike Travis2020-11-071-2/+5
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* Merge tag 'x86-irq-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2020-10-126-127/+77
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| * x86/apic/msi: Unbreak DMAR and HPET MSIThomas Gleixner2020-09-271-0/+2
| * x86/irq: Cleanup the arch_*_msi_irqs() leftoversThomas Gleixner2020-09-161-22/+0
| * x86/pci: Set default irq domain in pcibios_add_device()Thomas Gleixner2020-09-161-1/+1
| * x86/irq: Initialize PCI/MSI domain at PCI init timeThomas Gleixner2020-09-162-14/+19
| * x86/irq: Move apic_post_init() invocation to one placeThomas Gleixner2020-09-163-6/+3
| * x86/msi: Use generic MSI domain opsThomas Gleixner2020-09-161-29/+1
| * x86/msi: Consolidate MSI allocationThomas Gleixner2020-09-161-4/+3
| * PCI/MSI: Rework pci_msi_domain_calc_hwirq()Thomas Gleixner2020-09-161-1/+1
| * x86/irq: Consolidate DMAR irq allocationThomas Gleixner2020-09-161-5/+5
| * x86_ioapic_Consolidate_IOAPIC_allocationThomas Gleixner2020-09-161-35/+35
| * x86/msi: Consolidate HPET allocationThomas Gleixner2020-09-161-7/+7
| * iommu/irq_remapping: Consolidate irq domain lookupThomas Gleixner2020-09-162-2/+2
| * x86/irq: Add allocation type for parent domain retrievalThomas Gleixner2020-09-162-2/+2
| * x86_irq_Rename_X86_IRQ_ALLOC_TYPE_MSI_to_reflect_PCI_dependencyThomas Gleixner2020-09-161-3/+3
| * x86/msi: Remove pointless vcpu_affinity callbackThomas Gleixner2020-09-161-1/+0
| * x86/msi: Move compose message callback where it belongsThomas Gleixner2020-09-162-9/+4
| * genirq/chip: Use the first chip in irq_chip_compose_msi_msg()Thomas Gleixner2020-09-161-2/+5
* | x86/platform/uv: Update Copyrights to conform to HPE standardsMike Travis2020-10-071-0/+1
* | x86/platform/uv: Update UV5 TSC checkingMike Travis2020-10-071-14/+10
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