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path: root/arch/x86/kernel/cpu/mtrr (follow)
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* x86/mtrr: Document missing function parameters in kernel-docBorislav Petkov (AMD)2023-11-201-4/+10
* x86/mtrr: Unify debugging printingBorislav Petkov (AMD)2023-06-014-40/+29
* x86/mtrr: Remove unused codeJuergen Gross2023-06-011-9/+0
* x86/mtrr: Don't let mtrr_type_lookup() return MTRR_TYPE_INVALIDJuergen Gross2023-06-011-2/+2
* x86/mtrr: Use new cache_map in mtrr_type_lookup()Juergen Gross2023-06-011-194/+43
* x86/mtrr: Add mtrr=debug command line optionJuergen Gross2023-06-011-19/+45
* x86/mtrr: Construct a memory map with cache modesJuergen Gross2023-06-013-2/+314
* x86/mtrr: Add get_effective_type() service functionJuergen Gross2023-06-011-20/+19
* x86/mtrr: Allocate mtrr_value array dynamicallyJuergen Gross2023-06-011-1/+7
* x86/mtrr: Move 32-bit code from mtrr.c to legacy.cJuergen Gross2023-06-014-75/+98
* x86/mtrr: Have only one set_mtrr() variantJuergen Gross2023-06-011-20/+8
* x86/mtrr: Replace vendor tests in MTRR codeJuergen Gross2023-06-017-29/+31
* x86/mtrr: Support setting MTRR state for software defined MTRRsJuergen Gross2023-06-012-2/+72
* x86/mtrr: Replace size_or_mask and size_and_mask with a much easier conceptJuergen Gross2023-06-014-43/+35
* x86/mtrr: Remove physical address size calculationJuergen Gross2023-05-094-64/+29
* x86/mtrr: Make message for disabled MTRRs more descriptiveJuergen Gross2022-12-051-1/+3
* x86/mtrr: Simplify mtrr_ops initializationJuergen Gross2022-11-105-54/+10
* x86: Decouple PAT and MTRR handlingJuergen Gross2022-11-101-10/+2
* x86/mtrr: Add a stop_machine() handler calling only cache_cpu_init()Juergen Gross2022-11-101-86/+2
* x86/mtrr: Let cache_aps_delayed_init replace mtrr_aps_delayed_initJuergen Gross2022-11-101-13/+5
* x86/mtrr: Get rid of __mtrr_enabled boolJuergen Gross2022-11-101-8/+5
* x86/mtrr: Simplify mtrr_bp_init()Juergen Gross2022-11-103-20/+1
* x86/mtrr: Remove set_all callback from struct mtrr_opsJuergen Gross2022-11-103-8/+5
* x86/mtrr: Disentangle MTRR init from PAT initJuergen Gross2022-11-101-13/+2
* x86/mtrr: Move cache control code to cacheinfo.cJuergen Gross2022-11-101-74/+0
* x86/mtrr: Split MTRR-specific handling from cache dis/enablingJuergen Gross2022-11-101-7/+19
* x86/mtrr: Rename prepare_set() and post_set()Juergen Gross2022-11-101-22/+21
* x86/mtrr: Replace use_intel() with a local flagJuergen Gross2022-11-103-18/+13
* x86/mtrr: Remove unused cyrix_set_all() functionJuergen Gross2022-10-201-34/+0
* x86/mtrr: Add comment for set_mtrr_state() serializationJuergen Gross2022-10-191-1/+4
* x86/mtrr: Replace deprecated CPU-hotplug functions.Sebastian Andrzej Siewior2021-08-101-4/+4
* x86/msr: Rename MSR_K8_SYSCFG to MSR_AMD64_SYSCFGBrijesh Singh2021-05-102-3/+3
* x86: Fix various typos in comments, take #2Ingo Molnar2021-03-211-1/+1
* x86: Fix various typos in commentsIngo Molnar2021-03-181-1/+1
* Merge tag 'x86_mm_for_v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds2021-02-213-5/+2
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| * x86: Remove definition of DEBUGTom Rix2021-01-152-3/+0
| * x86/mtrr: Convert comma to semicolonZheng Yongjun2020-12-301-2/+2
* | x86/mtrr: Correct the range check before performing MTRR type lookupsYing-Tsun Huang2021-01-061-3/+3
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* Merge tag 'core-rcu-2020-12-14' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2020-12-151-2/+0
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| * x86/smpboot: Move rcu_cpu_starting() earlierPaul E. McKenney2020-11-201-2/+0
* | x86/mtrr: Fix a kernel-doc markupMauro Carvalho Chehab2020-11-021-1/+2
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* treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva2020-08-241-1/+1
* x86/tlb: Move __flush_tlb() out of lineThomas Gleixner2020-04-261-2/+2
* proc: convert everything to "struct proc_ops"Alexey Dobriyan2020-02-041-10/+11
* Merge branch 'x86-mtrr-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds2020-01-281-41/+22
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| * x86/mtrr: Require CAP_SYS_ADMIN for all accessKees Cook2019-12-091-19/+2
| * x86/mtrr: Get rid of mtrr_seq_show() forward declarationBorislav Petkov2019-12-091-22/+20
* | x86/mm/pat: Rename <asm/pat.h> => <asm/memtype.h>Ingo Molnar2019-12-102-2/+2
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* x86: mtrr: cyrix: Mark expected switch fall-throughGustavo A. R. Silva2019-08-071-0/+1
* x86/mtrr: Skip cache flushes on CPUs with cache self-snoopingRicardo Neri2019-06-281-2/+13
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