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path: root/drivers/clk/at91/at91sam9x5.c (follow)
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* clk: at91: clk-utmi: add support for parent_hwClaudiu Beznea2023-06-211-1/+1
* clk: at91: clk-system: add support for parent_hwClaudiu Beznea2023-06-211-2/+2
* clk: at91: clk-programmable: add support for parent_hwClaudiu Beznea2023-06-211-1/+1
* clk: at91: clk-peripheral: add support for parent_hwClaudiu Beznea2023-06-211-2/+2
* clk: at91: clk-master: add support for parent_hwClaudiu Beznea2023-06-211-2/+2
* clk: at91: clk-main: add support for parent_data/parent_hwClaudiu Beznea2023-06-211-2/+2
* clk: at91: mark ddr clocks as criticalClaudiu Beznea2023-01-091-5/+12
* clk: at91: clk-master: remove dead codeClaudiu Beznea2022-03-081-2/+1
* clk: at91: clk-master: add notifier for dividerClaudiu Beznea2021-10-271-1/+1
* clk: at91: Fix the declaration of the clocksTudor Ambarus2021-02-101-10/+10
* clk: at91: clk-master: re-factor master clockClaudiu Beznea2020-12-191-8/+20
* clk: at91: clk-programmable: add mux_table optionClaudiu Beznea2020-07-241-1/+2
* clk: at91: clk-peripheral: add support for changeable parent rateClaudiu Beznea2020-07-241-2/+2
* clk: at91: allow setting all PMC clock parents via DTMichał Mirosław2020-05-271-1/+3
* clk: at91: allow setting PCKx parent via DTMichał Mirosław2020-05-271-1/+3
* clk: at91: optimize pmc data allocationMichał Mirosław2020-05-271-1/+1
* clk: at91: fix possible deadlockAlexandre Belloni2019-12-161-1/+1
* clk: at91: Mark struct clk_range as constStephen Boyd2019-04-251-1/+1
* clk: at91: allow configuring peripheral PCR layoutAlexandre Belloni2019-04-251-0/+9
* clk: at91: fix masterck nameAlexandre Belloni2019-02-201-1/+1
* clk: at91: fix at91sam9x5 peripheral clock numberAlexandre Belloni2019-02-201-2/+1
* clk: at91: add at91sam9x5 PMCs driverAlexandre Belloni2018-10-171-0/+309