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path: root/drivers/clk/bcm (follow)
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* clk: iproc: Remove __init marking on iproc_pll_clk_setup()Stephen Boyd2017-06-211-6/+6
* clk: bcm: Add clocks for Stingray SOCSandeep Tripathy2017-06-203-0/+336
* clk: bcm2835: Minimise clock jitter for PCM clockPhil Elwell2017-06-031-5/+29
* clk: bcm2835: Limit PCM clock to OSC and PLLD_PERPhil Elwell2017-06-031-1/+26
* clk: bcm2835: Correct the prediv logicPhil Elwell2017-06-031-1/+3
* clk: ns2: Correct SDIO bitsBharat Kumar Reddy Gooty2017-04-191-1/+1
* clk: iproc: Remove redundant checkRay Jui2017-04-121-1/+1
* clk: bcm2835: Add leaf clock measurement support, disabled by defaultEric Anholt2017-01-211-25/+119
* clk: bcm2835: Register the DSI0/DSI1 pixel clocks.Eric Anholt2017-01-211-12/+109
* clk: bcm2835: Don't rate change PLLs on behalf of DSI PLL dividers.Eric Anholt2017-01-211-14/+28
* clk: bcm: Fix 'maybe-uninitialized' warning in bcm2835_clock_choose_div_and_p...Boris Brezillon2016-12-121-1/+1
* clk: bcm: Make COMMON_CLK_IPROC into a libraryStephen Boyd2016-12-091-11/+5
* clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clockBoris Brezillon2016-12-091-1/+6
* clk: bcm: Support rate change propagation on bcm2835 clocksBoris Brezillon2016-12-091-4/+63
* clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clkBoris Brezillon2016-12-081-1/+3
* Merge branch 'clk-fixes' into clk-nextStephen Boyd2016-11-231-1/+1
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| * clk: bcm: Fix unmet Kconfig dependencies for CLK_BCM_63XXFlorian Fainelli2016-11-231-1/+1
* | clk: bcm2835: Fix ->fixed_divider of pllh_auxBoris Brezillon2016-11-231-1/+1
* | clk: bcm2835: Clamp the PLL's requested rate to the hardware limits.Eric Anholt2016-10-181-7/+4
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* clk: bcm: Add driver for BCM53573 ILP clockRafał Miłecki2016-09-172-0/+149
* clk: bcm2835: Migrate to clk_hw based registration and OF APIsStephen Boyd2016-09-152-55/+58
* clk: iproc: Make clocks visible optionsJon Mason2016-09-152-5/+32
* clk-kona-setup: Use kmalloc_array() in parent_process()Markus Elfring2016-09-141-2/+2
* clk: bcm2835: Skip PLLC clocks when deciding on a new clock parentEric Anholt2016-09-071-0/+23
* clk: bcm2835: Mark the CM SDRAM clock's parent as criticalEric Anholt2016-09-071-0/+25
* clk: bcm2835: Mark GPIO clocks enabled at boot as criticalEric Anholt2016-09-071-1/+9
* clk: bcm2835: Mark the VPU clock as criticalEric Anholt2016-09-071-1/+4
* clk: bcm: kona: Migrate to clk_hw based registration and OF APIsStephen Boyd2016-08-253-51/+41
* clk: bcm: iproc: Migrate to clk_hw based registration and OF APIsStephen Boyd2016-06-303-35/+33
* clk: iproc: fix missing include of clk-iproc.hBen Dooks2016-06-211-0/+2
* clk: bcm/kona: Do not use sizeof on pointer typeVaishali Thakkar2016-05-061-1/+2
* clk: bcm2835: Fix PLL poweronEric Anholt2016-04-201-0/+4
* clk: bcm2835: Fix compiler warnings on 64-bit buildsEric Anholt2016-04-201-4/+4
* clk: bcm2835: add missing osc and per clocksMartin Sperl2016-03-171-0/+90
* clk: bcm2835: add missing PLL clock dividersMartin Sperl2016-03-171-0/+32
* clk: bcm2835: enable management of PCM clockMartin Sperl2016-03-171-0/+7
* clk: bcm2835: reorganize bcm2835_clock_array assignmentMartin Sperl2016-03-171-459/+393
* clk: bcm2835: remove use of BCM2835_CLOCK_COUNT in driverMartin Sperl2016-03-171-73/+94
* clk: bcm2835: expose raw clock-registers via debugfsMartin Sperl2016-03-171-0/+101
* clk: bcm2835: clean up coding style issuesMartin Sperl2016-03-171-6/+2
* clk: bcm2835: correctly enable fractional clock supportMartin Sperl2016-03-171-6/+39
* clk: bcm2835: divider value has to be 1 or moreMartin Sperl2016-03-171-2/+3
* clk: bcm2835: add locking to pll*_on/off methodsMartin Sperl2016-03-171-0/+4
* clk: bcm2835: pll_off should only update CM_PLL_ANARSTMartin Sperl2016-03-171-2/+8
* clk: bcm2835: fix check of error code returned by devm_ioremap_resource()Vladimir Zapolskiy2016-03-161-2/+2
* clk: bcm: Remove CLK_IS_ROOTStephen Boyd2016-03-031-6/+3
* clk: bcm2835: added missing clock register definitionsMartin Sperl2016-02-261-0/+13
* Merge branch 'clk-bcm2835' into clk-nextMichael Turquette2016-02-161-16/+9
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| * clk: bcm2835: Reuse CLK_DIVIDER_MAX_AT_ZERO for recalc_rate()Eric Anholt2016-02-161-11/+2
| * clk: bcm2835: Fix setting of PLL divider clock ratesEric Anholt2016-02-161-5/+7
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