| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: hi6220: use CLK_OF_DECLARE_DRIVER | Peter Griffin | 2019-10-28 | 1 | -1/+2 |
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 | Thomas Gleixner | 2019-06-19 | 1 | -4/+1 |
| * | clk: hi6220: mark clock cs_atb_syspll as critical | Leo Yan | 2017-11-01 | 1 | -1/+1 |
| * | clk: hi6220: change watchdog clock source | Leo Yan | 2017-09-01 | 1 | -3/+3 |
| * | clk: hi6220: add acpu clock | Zhangfei Gao | 2017-06-20 | 1 | -0/+22 |
| * | clk: hi6220: add debug APB clock | Leo Yan | 2017-04-12 | 1 | -0/+1 |
| * | clk: hi6220: use CLK_OF_DECLARE_DRIVER for sysctrl and mediactrl clock init | Shawn Guo | 2016-10-18 | 1 | -2/+2 |
| * | clk: hi6220: Change syspll and media_syspll clk to 1.19GHz | Xinliang Liu | 2016-07-07 | 1 | -2/+2 |
| * | clk: hi6220: Add RTC clock for pl031 | Zhangfei Gao | 2016-06-30 | 1 | -0/+2 |
| * | clk: hisilicon: Remove CLK_IS_ROOT | Stephen Boyd | 2016-03-03 | 1 | -13/+13 |
| * | clk: hi6220: Clock driver support for Hisilicon hi6220 SoC | Bintian Wang | 2015-06-04 | 1 | -0/+284 |
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