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path: root/drivers/clk/imx/clk.h (follow)
Commit message (Expand)AuthorAgeFilesLines
* clk: imx: add mcore_booted module paratemterPeng Fan2022-04-121-0/+1
* clk: imx: support fracn gppllPeng Fan2022-03-041-0/+21
* clk: imx: add i.MX93 composite clkPeng Fan2022-03-041-0/+9
* clk: imx8m: Do not set IMX_COMPOSITE_CORE for non-regular compositesAlexander Stein2021-11-051-2/+2
* clk: imx: Update the pfdv2 for 8ulp specific supportJacky Bai2021-09-301-2/+7
* clk: imx: Update the compsite driver to support imx8ulpJacky Bai2021-09-301-0/+6
* clk: imx: Update the pllv4 to support imx8ulpJacky Bai2021-09-301-2/+7
* clk: imx: Rework imx_clk_hw_pll14xx wrapperAbel Vesa2021-09-301-7/+3
* clk: imx: Rework all imx_clk_hw_composite wrappersAbel Vesa2021-09-301-30/+34
* clk: imx: Rework all clk_hw_register_divider wrappersAbel Vesa2021-09-301-18/+11
* clk: imx: Rework all clk_hw_register_mux wrappersAbel Vesa2021-09-301-46/+22
* clk: imx: Rework all clk_hw_register_gate2 wrappersAbel Vesa2021-09-301-51/+26
* clk: imx: Rework all clk_hw_register_gate wrappersAbel Vesa2021-09-171-41/+23
* clk: imx: Make mux/mux2 clk based helpers use clk_hw based onesAbel Vesa2021-09-171-20/+6
* clk: imx: Remove unused helpersAbel Vesa2021-09-171-103/+0
* clk: imx8m: fix clock tree update of TF-A managed clocksAhmad Fatoum2021-08-241-2/+14
* clk: imx: Fix reparenting of UARTs not associated with stdoutAdam Ford2021-04-041-2/+2
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2020-12-211-15/+12
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| * clk: imx: gate2: Add cgr_mask for more flexible number of control bitsAbel Vesa2020-11-031-12/+12
| * clk: imx: gate2: Remove the IMX_CLK_GATE2_SINGLE_BIT special caseAbel Vesa2020-11-031-4/+1
* | clk: imx8m: fix bus critical clk registrationPeng Fan2020-11-051-0/+5
|/
* clk: imx: Explicitly include bits.hAnson Huang2020-08-221-0/+1
* clk: imx: Support building i.MX common clock driver as moduleAnson Huang2020-08-221-0/+6
* clk: imx: add imx8m_clk_hw_composite_busPeng Fan2020-05-211-0/+7
* clk: imx: Add helpers for passing the device as argumentAbel Vesa2020-04-291-0/+29
* clk: imx: pll14xx: Add the device as argument when registeringAbel Vesa2020-04-291-3/+10
* clk: imx: gate2: Allow single bit gating clockAbel Vesa2020-04-291-0/+13
* clk: imx: composite-8m: add imx8m_clk_hw_composite_corePeng Fan2020-02-141-2/+11
* clk: imx: gate4: Switch imx_clk_gate4_flags() to clk_hw based APIAnson Huang2020-01-121-2/+5
* clk: imx: gate3: Switch to clk_hw based APIPeng Fan2019-12-231-2/+5
* clk: imx: add hw API imx_clk_hw_mux2_flagsPeng Fan2019-12-231-0/+10
* clk: imx: add imx_unregister_hw_clocksPeng Fan2019-12-231-0/+1
* clk: imx: clk-composite-8m: Switch to clk_hw based APIPeng Fan2019-12-231-7/+22
* clk: imx: clk-pll14xx: Switch to clk_hw based APIPeng Fan2019-12-231-0/+7
* clk: imx: Rename the imx_clk_divider_gate to imply it's clk_hw basedAbel Vesa2019-12-111-1/+1
* clk: imx: Rename the imx_clk_pfdv2 to imply it's clk_hw basedAbel Vesa2019-12-111-1/+1
* clk: imx: Rename the imx_clk_pllv4 to imply it's clk_hw basedAbel Vesa2019-12-111-1/+1
* clk: imx: Rename sccg and frac pll register to suggest clk_hwAbel Vesa2019-12-111-2/+10
* clk: imx: imx7ulp composite: Rename to show is clk_hw basedAbel Vesa2019-12-111-1/+1
* clk: imx: pllv2: Switch to clk_hw based APIAbel Vesa2019-12-111-1/+4
* clk: imx: pllv1: Switch to clk_hw based APIAbel Vesa2019-12-111-1/+4
* clk: imx: Replace all the clk based helpers with macrosAbel Vesa2019-12-111-27/+12
* clk: imx: Rename the SCCG to SSCGAbel Vesa2019-12-111-2/+2
* clk: imx: Add correct failure handling for clk based helpersAbel Vesa2019-12-111-15/+22
* clk: imx: Mark dram pll on 8mm and 8mn with CLK_GET_RATE_NOCACHELeonard Crestez2019-12-091-0/+1
* clk: imx8mm: Move 1443X/1416X PLL clock structure to common placeAnson Huang2019-10-061-0/+3
* clk: imx: Remove unused function statementAnson Huang2019-08-031-1/+0
* clk: imx: Remove unused clk based APIAbel Vesa2019-08-031-24/+0
* clk: imx: Add API for clk unregister when driver probe failAnson Huang2019-08-031-0/+1
* clk: imx8mm: Make 1416X/1443X PLL macro definitions common for usageAnson Huang2019-08-031-0/+17
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 06:36:59 +0100