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path: root/drivers/clk/mediatek/clk-mt2712.c (follow)
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* clk: mediatek: Add a module description where missingAngeloGioacchino Del Regno2024-06-041-0/+2
* clk: Explicitly include correct DT includesRob Herring2023-07-191-3/+1
* clk: mediatek: Make mtk_clk_simple_remove() return voidUwe Kleine-König2023-05-101-1/+1
* clk: mediatek: Add MODULE_DEVICE_TABLE() where appropriateAngeloGioacchino Del Regno2023-03-131-0/+1
* clk: mediatek: Add MODULE_LICENSE() where missingAngeloGioacchino Del Regno2023-03-131-0/+1
* clk: mediatek: Consistently use GATE_MTK() macroAngeloGioacchino Del Regno2023-03-131-51/+15
* clk: mediatek: mt2712: Change to use module_platform_driver macroAngeloGioacchino Del Regno2023-03-131-11/+5
* clk: mediatek: mt2712: Move apmixedsys clock driver to its own fileAngeloGioacchino Del Regno2023-03-131-164/+0
* clk: mediatek: mt2712: Add error handling to clk_mt2712_apmixed_probe()AngeloGioacchino Del Regno2023-03-131-4/+14
* clk: mediatek: mt2712: Compress clock arrays entries to 90 columnsAngeloGioacchino Del Regno2023-03-131-435/+246
* clk: mediatek: mt2712: Migrate topckgen/mcucfg to mtk_clk_simple_probe()AngeloGioacchino Del Regno2023-03-131-106/+21
* clk: mediatek: Switch to mtk_clk_simple_probe() where possibleAngeloGioacchino Del Regno2023-01-311-51/+32
* clk: mediatek: clk-mtk: Propagate struct device for compositesAngeloGioacchino Del Regno2023-01-311-4/+8
* clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates()AngeloGioacchino Del Regno2023-01-311-6/+6
* clk: mediatek: reset: Add new register reset function with deviceRex-BC Chen2022-06-161-2/+2
* clk: mediatek: reset: Support nonsequence base offsets of reset registersRex-BC Chen2022-06-161-4/+7
* clk: mediatek: reset: Revise structure to control reset registerRex-BC Chen2022-06-161-2/+17
* clk: mediatek: reset: Merge and revise reset register functionRex-BC Chen2022-06-161-2/+2
* clk: mediatek: Replace 'struct clk' with 'struct clk_hw'Chen-Yu Tsai2022-05-201-14/+14
* clk: mediatek: use en_mask as a pure div_en_maskChun-Jie Chen2022-05-191-15/+15
* clk: mediatek: pll: Split definitions into separate header fileChen-Yu Tsai2022-02-171-1/+2
* clk: mediatek: mt2712: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-10-171-4/+2
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2019-05-301-9/+1
*-. Merge branches 'clk-typo', 'clk-json-schema', 'clk-mtk-2712-eco' and 'clk-roc...Stephen Boyd2019-03-081-2/+6
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| | * clk: mediatek: update clock driver of MT2712Weiyi Lu2019-02-051-2/+6
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* / clk: mediatek: fix platform_no_drv_owner.cocci warningsYueHaibing2019-02-221-1/+0
|/
* clk: mediatek: update clock driver of MT2712Weiyi Lu2018-03-191-14/+55
* clk: mediatek: Add MT2712 clock supportweiyi.lu@mediatek.com2017-11-021-0/+1435
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