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path: root/drivers/clk/mediatek/clk-mt6797.c (follow)
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* clk: mediatek: Add a module description where missingAngeloGioacchino Del Regno2024-06-041-0/+2
* clk: mediatek: clk-mt6797: Add check for mtk_alloc_clk_dataJiasheng Jiang2023-10-191-0/+6
* clk: Explicitly include correct DT includesRob Herring2023-07-191-2/+0
* clk: mediatek: Add MODULE_DEVICE_TABLE() where appropriateAngeloGioacchino Del Regno2023-03-131-0/+1
* clk: mediatek: Add MODULE_LICENSE() where missingAngeloGioacchino Del Regno2023-03-131-0/+1
* clk: mediatek: Consistently use GATE_MTK() macroAngeloGioacchino Del Regno2023-03-131-30/+12
* clk: mediatek: clk-mtk: Propagate struct device for compositesAngeloGioacchino Del Regno2023-01-311-1/+2
* clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates()AngeloGioacchino Del Regno2023-01-311-2/+2
* clk: mediatek: Replace 'struct clk' with 'struct clk_hw'Chen-Yu Tsai2022-05-201-10/+12
* clk: mediatek: use en_mask as a pure div_en_maskChun-Jie Chen2022-05-191-10/+10
* clk: mediatek: pll: Split definitions into separate header fileChen-Yu Tsai2022-02-171-1/+2
* clk: mediatek: mt6797: simplify the return expression of mtk_infrasys_initLiu Shixin2020-09-221-6/+2
* clk: mediatek: mt6797: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-10-171-2/+1
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2019-05-301-9/+1
* clk: mediatek: Mark bus and DRAM related clocks as criticalJasper Mattsson2019-02-261-25/+43
* clk: mediatek: add clk support for MT6797Kevin-CW Chen2017-04-191-0/+714
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