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path: root/drivers/clk/microchip (follow)
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* clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIREConor Dooley2022-12-091-1/+2
* clk: microchip: check for null return of devm_kzalloc()Hui Tang2022-11-241-0/+6
* clk: microchip: add PolarFire SoC fabric clock supportConor Dooley2022-09-142-0/+291
* clk: microchip: mpfs: update module authorship & licencingConor Dooley2022-09-141-3/+7
* clk: microchip: mpfs: convert periph_clk to clk_gateConor Dooley2022-09-141-66/+6
* clk: microchip: mpfs: convert cfg_clk to clk_dividerConor Dooley2022-09-141-68/+8
* clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo()Conor Dooley2022-09-141-27/+6
* clk: microchip: mpfs: simplify control reg accessConor Dooley2022-09-141-25/+17
* clk: microchip: mpfs: move id & offset out of clock structsConor Dooley2022-09-141-15/+15
* clk: microchip: mpfs: add MSS pll's set & round rateConor Dooley2022-09-141-0/+54
* clk: microchip: mpfs: add reset controllerConor Dooley2022-09-142-12/+99
* clk: microchip: mpfs: make the rtc's ahb clock criticalConor Dooley2022-09-141-1/+3
* clk: microchip: mpfs: fix clk_cfg array bounds violationConor Dooley2022-09-141-1/+6
* clk: microchip: mpfs: add RTCREF clock controlConor Dooley2022-04-231-1/+23
* clk: microchip: mpfs: re-parent the configurable clocksConor Dooley2022-04-231-19/+132
* clk: microchip: mpfs: mark CLK_ATHENA as criticalConor Dooley2022-04-231-3/+5
* clk: microchip: mpfs: fix parents for FIC clocksConor Dooley2022-04-231-5/+5
* clk: microchip: mpfs: don't reset disabled peripheralsConor Dooley2022-04-221-4/+0
* clk: microchip: Add driver for Microchip PolarFire SoCDaire McNamara2022-03-123-0/+392
* clk: let init callback return an error codeJerome Brunet2019-12-241-2/+6
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 445Thomas Gleixner2019-06-053-27/+3
* treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-211-0/+1
* clk: Remove io.h from clk-provider.hStephen Boyd2019-05-152-0/+2
* clk: microchip: Initialize SOSC clock rate for PIC32MZDA.Purna Chandra Mandal2016-08-251-0/+1
* clk: microchip: use readl_poll_timeout() in pbclk_set_rate().Purna Chandra Mandal2016-08-251-3/+3
* clk: microchip: Remove CLK_IS_ROOTStephen Boyd2016-06-011-5/+5
* CLK: microchip: Add Microchip PIC32 clock driver.Purna Chandra Mandal2016-05-134-0/+1392