| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) | Lad Prabhakar | 2020-09-04 | 1 | -1/+1 |
| * | Merge branch 'clk-renesas' into clk-next | Stephen Boyd | 2018-10-19 | 1 | -1/+12 |
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| | * | clk: renesas: r8a7743: Add r8a7744 support | Biju Das | 2018-09-19 | 1 | -1/+12 |
| * | | clk: renesas: Convert to SPDX identifiers | Kuninori Morimoto | 2018-09-29 | 1 | -4/+1 |
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| * | clk: renesas: r8a7743: Fix LB clock divider | Geert Uytterhoeven | 2018-04-16 | 1 | -1/+1 |
| * | clk: renesas: r8a7743: Add rwdt clock | Fabrizio Castro | 2018-02-20 | 1 | -0/+2 |
| * | clk: renesas: cpg-mssr: Add R8A7743 support | Sergei Shtylyov | 2016-11-10 | 1 | -0/+270 |
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