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path: root/drivers/clk/renesas/r8a7795-cpg-mssr.c (follow)
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* clk: renesas: rcar-gen3: Add SDnH clockWolfram Sang2021-11-191-4/+8
* clk: renesas: r8a779[56]x: Add MLP clocksAndrey Gusakov2021-10-151-0/+1
* clk: renesas: r8a7795: Add TMU clocksNiklas Söderlund2021-03-121-0/+6
* clk: renesas: rcar-gen3: Mark RWDT clocks as criticalUlrich Hecht2020-06-221-1/+1
* clk: renesas: r8a7795: Add RPC clocksDirk Behme2020-02-101-0/+8
* clk: renesas: r8a7795: Add CMM clocksJacopo Mondi2019-06-181-0/+4
* clk: renesas: r8a779{5|6|65}: Add TPU clockCao Van Dong2019-05-211-0/+1
* clk: renesas: rcar-gen3: Rename DRIF clocksTakeshi Kihara2019-04-021-9/+9
* clk: renesas: rcar-gen3: Correct parent clock of Audio-DMACTakeshi Kihara2019-04-021-2/+2
* clk: renesas: rcar-gen3: Correct parent clock of SYS-DMACTakeshi Kihara2019-04-021-2/+2
* clk: renesas: rcar-gen3: Correct parent clock of HS-USBKazuya Mizuguchi2019-04-021-2/+2
* clk: renesas: rcar-gen3: Correct parent clock of EHCI/OHCIKazuya Mizuguchi2019-04-021-4/+4
* clk: renesas: rcar-gen3: Remove CLK_TYPE_GEN3_Z2Simon Horman2019-04-021-1/+1
* clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offsetSimon Horman2019-04-021-2/+2
* clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisorTakeshi Kihara2019-04-021-2/+3
* clk: renesas: r8a7795: Add CPEX clockGeert Uytterhoeven2018-12-041-0/+1
* Merge branch 'clk-renesas' into clk-nextStephen Boyd2018-10-191-33/+34
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| * clk: renesas: r8a7795: Add OSC EXTAL predivider configurationGeert Uytterhoeven2018-08-271-33/+33
| * clk: renesas: rcar-gen3: Rename rint to .rGeert Uytterhoeven2018-08-271-1/+2
* | clk: renesas: use SPDX identifier for Renesas driversWolfram Sang2018-08-311-4/+1
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* clk: renesas: r8a7795: Add CCREE clockGilad Ben-Yossef2018-06-191-0/+1
* clk: renesas: r8a7795: Add CR clockGeert Uytterhoeven2018-06-191-0/+1
* clk: renesas: r8a7795: Add Z2 clockTakeshi Kihara2018-02-121-0/+1
* clk: renesas: r8a7795: Add Z clockTakeshi Kihara2018-02-121-0/+1
* clk: renesas: r8a7795: Correct parent clock of INTC-APGeert Uytterhoeven2017-10-161-1/+2
* clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3Geert Uytterhoeven2017-08-161-17/+17
* clk: renesas: r8a7795: Correct pwm, gpio, and i2c parent clocks on ES2.0Geert Uytterhoeven2017-05-151-13/+26
* clk: renesas: r8a7795: Add HS-USB ch3 clockTakeshi Kihara2017-05-151-0/+1
* clk: renesas: r8a7795: Add USB-DMAC ch3 clockTakeshi Kihara2017-05-151-0/+2
* clk: renesas: r8a7795: Add EHCI/OHCI ch3 clockTakeshi Kihara2017-05-151-0/+1
* clk: renesas: r8a7795: Add support for R-Car H3 ES2.0Geert Uytterhoeven2017-03-301-50/+151
* clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init()Geert Uytterhoeven2017-03-211-1/+1
* clk: renesas: r8a7795: Reformat core clock tableGeert Uytterhoeven2017-03-211-10/+10
* clk: renesas: r8a7795: Correct name of watchdog clockGeert Uytterhoeven2017-03-211-1/+1
* clk: renesas: r8a7795: Correct parent clock and sort order for Audio DMACsGeert Uytterhoeven2017-03-211-2/+2
* clk: renesas: r8a7795: Add IMR clocksSergei Shtylyov2017-03-061-0/+4
* clk: renesas: r8a7795: Add IIC-DVFS clockKeita Kobayashi2017-01-271-0/+1
* clk: renesas: r8a7795: Fix HDMI parent clockTakeshi Kihara2016-11-071-1/+1
* clk: renesas: r8a7795: Obtain mode pin values from R-Car RST driverGeert Uytterhoeven2016-11-021-1/+7
* Merge tag 'clk-renesas-for-v4.9-tag3' of git://git.kernel.org/pub/scm/linux/k...Stephen Boyd2016-09-141-0/+4
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| * clk: renesas: r8a7795: Add CMT clocksBui Duc Phuc2016-09-121-0/+4
* | clk: renesas: r8a7795: Fix SD clocksYoshihiro Shimoda2016-08-121-4/+5
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* clk: renesas: r8a7795: Add THS/TSC clockKhiem Nguyen2016-06-211-0/+1
* clk: renesas: r8a7795: Add DRIF clockRamesh Shanmugasundaram2016-06-211-0/+8
* clk: renesas: r8a7795: Correct lvds clock parentGeert Uytterhoeven2016-06-211-1/+1
* clk: renesas: r8a7795: Provide FDP1 clocksKieran Bingham2016-06-211-0/+3
* clk: renesas: cpg-mssr: Extract common R-Car Gen3 support codeGeert Uytterhoeven2016-06-061-355/+5
* clk: renesas: r8a7795: Add VIN clocksNiklas Söderlund2016-04-261-0/+8
* clk: renesas: r8a7795: Add CSI2 clocksNiklas Söderlund2016-04-261-0/+5
* clk: renesas: r8a7795: add RWDT clockWolfram Sang2016-04-061-0/+1