linux - linux

	Commit message (Expand)	Author	Age	Files	Lines
*	clk: renesas: rcar-gen3: Add SDnH clock	Wolfram Sang	2021-11-19	1	-4/+8
*	clk: renesas: r8a779[56]x: Add MLP clocks	Andrey Gusakov	2021-10-15	1	-0/+1
*	clk: renesas: r8a7796: Add TMU clocks	Niklas Söderlund	2020-12-28	1	-0/+5
*	clk: renesas: rcar-gen3: Mark RWDT clocks as critical	Ulrich Hecht	2020-06-22	1	-1/+1
*	clk: renesas: r8a7796: Add RPC clocks	Dirk Behme	2020-02-10	1	-0/+8
*	clk: renesas: rcar-gen3: Add CCREE clocks	Geert Uytterhoeven	2020-02-10	1	-0/+2
*	clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support	Geert Uytterhoeven	2019-11-01	1	-4/+20
*	clk: renesas: r8a7796: Add CMM clocks	Jacopo Mondi	2019-05-21	1	-0/+3
*	clk: renesas: r8a779{5\|6\|65}: Add TPU clock	Cao Van Dong	2019-05-21	1	-0/+1
*	clk: renesas: rcar-gen3: Rename DRIF clocks	Takeshi Kihara	2019-04-02	1	-8/+8
*	clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC	Takeshi Kihara	2019-04-02	1	-2/+2
*	clk: renesas: rcar-gen3: Correct parent clock of SYS-DMAC	Takeshi Kihara	2019-04-02	1	-2/+2
*	clk: renesas: rcar-gen3: Correct parent clock of HS-USB	Kazuya Mizuguchi	2019-04-02	1	-1/+1
*	clk: renesas: rcar-gen3: Correct parent clock of EHCI/OHCI	Kazuya Mizuguchi	2019-04-02	1	-2/+2
*	clk: renesas: rcar-gen3: Remove CLK_TYPE_GEN3_Z2	Simon Horman	2019-04-02	1	-1/+1
*	clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offset	Simon Horman	2019-04-02	1	-2/+2
*	clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisor	Takeshi Kihara	2019-04-02	1	-2/+3
*	clk: renesas: r8a7796: Add CPEX clock	Geert Uytterhoeven	2018-12-04	1	-0/+1
*	Merge branch 'clk-renesas' into clk-next	Stephen Boyd	2018-10-19	1	-33/+34
\|\
\| *	clk: renesas: r8a7796: Add OSC EXTAL predivider configuration	Geert Uytterhoeven	2018-08-27	1	-33/+33
\| *	clk: renesas: rcar-gen3: Rename rint to .r	Geert Uytterhoeven	2018-08-27	1	-1/+2
* \|	clk: renesas: use SPDX identifier for Renesas drivers	Wolfram Sang	2018-08-31	1	-4/+1
\|/
*	clk: renesas: r8a7796: Add Z2 clock	Takeshi Kihara	2018-02-12	1	-0/+1
*	clk: renesas: r8a7796: Add Z clock	Takeshi Kihara	2018-02-12	1	-0/+1
*	clk: renesas: r8a7796: Add FDP clock	ABE Hiroshige	2018-01-05	1	-0/+1
*	clk: renesas: r8a7796: Correct parent clock of INTC-AP	Geert Uytterhoeven	2017-10-16	1	-1/+1
*	clk: renesas: r8a7796: Add USB3.0 clock	Hiromitsu Yamasaki	2017-08-17	1	-0/+1
*	clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3	Geert Uytterhoeven	2017-08-16	1	-17/+17
*	clk: renesas: r8a7796: Add INTC-EX clock	Takeshi Kihara	2017-05-15	1	-0/+1
*	clk: renesas: r8a7796: Add PCIe clocks	Harunobu Kurokawa	2017-05-15	1	-0/+2
*	clk: renesas: r8a7796: Add PWM clock	Ryo Kodama	2017-05-15	1	-0/+1
*	clk: renesas: r8a7796: Add HS-USB clock	Kazuya Mizuguchi	2017-05-15	1	-0/+1
*	clk: renesas: r8a7796: Add Sound DVC clocks	Kazuya Mizuguchi	2017-05-15	1	-0/+2
*	clk: renesas: r8a7796: Add Sound SRC clock	Kazuya Mizuguchi	2017-05-15	1	-0/+13
*	clk: renesas: r8a7796: Add Sound SSI clock	Kazuya Mizuguchi	2017-05-15	1	-0/+11
*	clk: renesas: r8a7796: Add USB-DMAC clocks	Hiromitsu Yamasaki	2017-05-15	1	-0/+2
*	clk: renesas: r8a7796: Add Audio-DMAC clocks	Hiromitsu Yamasaki	2017-05-15	1	-0/+2
*	clk: renesas: r8a7796: Add EHCI/OHCI clocks	Kazuya Mizuguchi	2017-05-15	1	-0/+2
*	clk: renesas: r8a7796: Add HDMI clock	Koji Matsuoka	2017-05-15	1	-0/+2
*	clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init()	Geert Uytterhoeven	2017-03-21	1	-1/+1
*	clk: renesas: r8a7796: Reformat core clock table	Geert Uytterhoeven	2017-03-21	1	-6/+6
*	clk: renesas: r8a7796: Correct name of watchdog clock	Geert Uytterhoeven	2017-03-21	1	-1/+1
*	clk: renesas: r8a7796: Add IMR clocks	Sergei Shtylyov	2017-03-06	1	-0/+2
*	clk: renesas: r8a7796: Add IIC-DVFS clock	Khiem Nguyen	2017-01-27	1	-0/+1
*	clk: renesas: r8a7796: Add MSIOF controller clocks	Hiromitsu Yamasaki	2016-12-27	1	-0/+5
*	clk: renesas: r8a7796: Add CAN FD peripheral clock	Chris Paterson	2016-12-27	1	-0/+1
*	clk: renesas: r8a7796: Add CANFD clock	Chris Paterson	2016-12-27	1	-0/+1
*	clk: renesas: r8a7796: Add CAN peripheral clock	Chris Paterson	2016-12-27	1	-0/+2
*	clk: renesas: r8a7796: Add VIN clocks	Niklas Söderlund	2016-11-07	1	-0/+8
*	clk: renesas: r8a7796: Add CSI2 clocks	Niklas Söderlund	2016-11-07	1	-0/+4