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path: root/drivers/clk/rockchip/clk-rk3288.c (follow)
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* clk: rockchip: mark noc and some special clk as critical on rk3288Elaine Zhang2017-06-021-4/+10
* clk: rockchip: rk3288: make all niu clocks criticalJacob Chen2017-01-231-7/+14
* clk: rockchip: use rk3288 vip_out clock idsJacob Chen2017-01-221-1/+1
* clk: rockchip: use rk3288 isp_in clock idsJacob Chen2017-01-131-1/+1
* clk: rockchip: describe aclk_vcodec using the new muxgrf type on rk3288Heiko Stuebner2017-01-021-6/+5
* clk: rockchip: release io resource when failing to init clkShawn Lin2016-03-271-0/+1
* clk: rockchip: Add support for multiple clock providersXing Zheng2016-03-271-6/+13
* clk: rockchip: allow varying mux parameters for cpuclk pll-sourcesXing Zheng2016-03-271-0/+3
* clk: rockchip: convert manually created factor clocks to the new typeHeiko Stuebner2016-02-041-17/+5
* clk: rockchip: fix usbphy-related clocksHeiko Stuebner2016-01-251-11/+5
* Merge branch 'clk-rockchip' into clk-nextMichael Turquette2016-01-021-16/+40
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| * clk: rockchip: fix section mismatches with new child-clocksHeiko Stübner2016-01-021-16/+40
* | Merge branch 'clk-rockchip' into clk-nextMichael Turquette2015-12-231-34/+36
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| * clk: rockchip: Allow the RK3288 SPDIF clocks to change their parentSjoerd Simons2015-12-231-8/+8
| * clk: rockchip: include downstream muxes into fractional dividersHeiko Stuebner2015-12-231-32/+34
* | clk: rockchip: only enter pll slow-mode directly before reboots on rk3288Heiko Stuebner2015-12-211-2/+2
* | clk: rockchip: use rk3288-efuse clock idsZhengShunQian2015-12-121-2/+2
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* clk: rockchip: switch PLLs to slow mode before reboot for rk3288Chris Zhong2015-12-011-18/+14
* clk: rockchip: add mipidsi clock on rk3288Chris Zhong2015-11-261-1/+1
* clk: rockchip: set the id for crypto clkZain Wang2015-11-231-1/+1
* Merge tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/l...Linus Torvalds2015-09-041-0/+1
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| * clk: rockchip: add pclk_pd_pmu to the list of rk3288 critical clocksHeiko Stuebner2015-08-131-0/+1
* | clk: rockchip: Fix PLL bandwidthDouglas Anderson2015-07-281-1/+1
* | clk: rockchip: define the inverters of rk3066/rk3188 and rk3288Heiko Stuebner2015-07-071-1/+6
* | clk: rockchip: fix faulty vip parent name on rk3288Heiko Stuebner2015-07-071-2/+2
* | clk: rockchip: rk3288: add CLK_SET_RATE_PARENT to sclk_macHeiko Stuebner2015-07-071-1/+1
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* clk: rockchip: Staticize file-scope declarationsKrzysztof Kozlowski2015-05-061-1/+1
* clk: don't use __initconst for non-const arraysUwe Kleine-König2015-04-131-1/+1
* Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/...Linus Torvalds2015-02-211-13/+35
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| * Merge tag 'v3.20-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/...Michael Turquette2015-01-281-13/+35
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| | * clk: rockchip: add a dummy clock for the watchdog pclk on rk3288Heiko Stuebner2015-01-221-0/+8
| | * clk: rockchip: add PVTM clocks on rk3288huang lin2015-01-221-2/+2
| | * clk: rockchip: use the clock ID for usbphy480m_srcKever Yang2015-01-221-1/+1
| | * clk: rockchip: rk3288: Make s2r reliable by switching PLLs to slow modeDoug Anderson2014-12-311-0/+14
| | * clk: rockchip: Add CLK_SET_RATE_PARENT to sclk_uart clocksDoug Anderson2014-12-211-10/+10
* | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2015-01-281-14/+14
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| * | clk: rockchip: fix rk3288 cpuclk core dividersHeiko Stuebner2014-12-281-14/+14
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* / GMAC: modify CRU config for Rockchip RK3288 SoCs integrated GMACRoger Chen2015-01-011-7/+7
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* clk: rockchip: Add support for the mmc clock phases using the frameworkAlexandru M Stan2014-11-281-0/+12
* clk: rockchip: rk3288 export i2s0_clkout for use in DTSonny Rao2014-11-281-1/+1
* clk: rockchip: use clock ID for DMC (memory controller) on rk3288Jeff Chen2014-11-261-4/+4
* clk: rockchip: add ROCKCHIP_PLL_SYNC_RATE flag to some pllsHeiko Stuebner2014-11-251-3/+3
* clk: rockchip: add ability to specify pll-specific flagsHeiko Stuebner2014-11-251-5/+5
* clk: rockchip: fix clock select order for rk3288 usbphy480m_srcKever Yang2014-11-161-2/+2
* clk: rockchip: fix rk3288 clk_usbphy480m_gate bit location in registerKever Yang2014-11-161-1/+1
* clk: rockchip: ensure HCLK_VIO2_H2P and PCLK_VIO2_H2P stay enabledDmitry Torokhov2014-11-131-2/+2
* clk: rockchip: rk3288: add suspend and resumeChris Zhong2014-11-101-0/+60
* clk: rockchip: disable unused clocksKever Yang2014-11-041-64/+64
* clk: rockchip: change PLL setting for better clock jitterKever Yang2014-10-291-1/+1
* clk: rockchip: add npll to source of sclk_gpuKever Yang2014-10-201-4/+4
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