| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock... | Gustavo A. R. Silva | 2023-10-24 | 1 | -3/+3 |
| * | clk: Explicitly include correct DT includes | Rob Herring | 2023-07-19 | 1 | -2/+1 |
| * | clk: socfpga: cleanup spdx tags | Tom Rix | 2022-03-12 | 1 | -1/+1 |
| * | clk: socfpga: s10: Make use of the helper function devm_platform_ioremap_reso... | Cai Huoqing | 2022-01-06 | 1 | -3/+1 |
| * | clk: agilex/stratix10: fix bypass representation | Dinh Nguyen | 2021-06-28 | 1 | -10/+45 |
| * | clk: agilex/stratix10: remove noc_clk | Dinh Nguyen | 2021-06-28 | 1 | -17/+15 |
| * | clk: socfpga: Convert to s10/agilex/n5x to use clk_hw | Dinh Nguyen | 2021-03-31 | 1 | -39/+29 |
| * | clk: socfpga: stratix10: fix the divider for the emac_ptp_free_clk | Dinh Nguyen | 2020-09-22 | 1 | -1/+1 |
| * | clk: socfpga: stratix10: use new parent data scheme | Dinh Nguyen | 2020-05-27 | 1 | -29/+131 |
| * | clk: socfpga: stratix10: simplify parameter passing | Dinh Nguyen | 2020-02-13 | 1 | -25/+4 |
| * | clk: socfpga: stratix10: fix divider entry for the emac clocks | Dinh Nguyen | 2019-06-25 | 1 | -2/+2 |
| * | clk: socfpga: stratix10: add additional clocks needed for the NAND IP | Dinh Nguyen | 2019-06-25 | 1 | -1/+5 |
| * | clk: socfpga: stratix10: fix naming convention for the fixed-clocks | Dinh Nguyen | 2019-01-15 | 1 | -10/+10 |
| * | clk: socfpga: stratix10: fix the sdmmc_free_clk mux | Dinh Nguyen | 2018-07-06 | 1 | -1/+1 |
| * | clk: socfpga: stratix10: fix the parents of mpu_free_clk | Dinh Nguyen | 2018-07-06 | 1 | -1/+6 |
| * | clk: socfpga: stratix10: suppress unbinding platform's clock driver | Dinh Nguyen | 2018-05-15 | 1 | -0/+1 |
| * | clk: socfpga: stratix10: use platform driver APIs | Dinh Nguyen | 2018-05-15 | 1 | -22/+17 |
| * | clk: socfpga: stratix10: add clock driver for Stratix10 platform | Dinh Nguyen | 2018-04-06 | 1 | -0/+345 |
