| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: sunxi-ng: h616: Add PLL derived 32KHz clock | Andre Przywara | 2022-05-06 | 1 | -0/+8 |
| * | clk: sunxi-ng: Convert early providers to platform drivers | Samuel Holland | 2021-11-23 | 1 | -10/+23 |
| * | clk: sunxi-ng: Unregister clocks/resets when unbinding | Samuel Holland | 2021-09-13 | 1 | -3/+1 |
| * | clk: sunxi-ng: Add support for the Allwinner H616 CCU | Andre Przywara | 2021-01-28 | 1 | -0/+1150 |
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