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path: root/drivers/clk/sunxi-ng/ccu_mp.c (follow)
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* clk: sunxi-ng: Avoid computing the rate twiceSamuel Holland2023-01-081-5/+6
* clk: sunxi-ng: Export symbols used by CCU driversSamuel Holland2021-11-221-0/+2
* clk: sunxi-ng: mp: fix parent rate change flag checkJernej Skrabec2021-02-121-1/+1
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner2019-05-301-5/+1
* clk: Remove io.h from clk-provider.hStephen Boyd2019-05-151-0/+1
* clk: sunxi-ng: Adjust MP clock parent rate when allowedJernej Skrabec2018-11-051-2/+62
* clk: sunxi-ng: Support fixed post-dividers on MP style clocksChen-Yu Tsai2017-12-071-2/+18
* clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switchingChen-Yu Tsai2017-08-301-0/+80
* clk: sunxi-ng: mux: Change pre-divider application function prototypeMaxime Ripard2017-06-071-4/+4
* clk: sunxi-ng: Pass the parent and a pointer to the clocks round rateMaxime Ripard2017-06-071-3/+4
* clk: sunxi-ng: mp: Adjust parent rate for pre-dividersChen-Yu Tsai2017-03-061-0/+8
* clk: sunxi-ng: Implement factors offsetsMaxime Ripard2017-01-231-3/+7
* clk: sunxi-ng: div: Allow to set a maximumMaxime Ripard2016-09-101-10/+13
* clk: sunxi-ng: Add M-P factor clock supportMaxime Ripard2016-07-091-0/+158