index
:
linux
master
linux
Fast-forward packages
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
drivers
/
clk
/
tegra
/
clk-tegra-periph.c
(
follow
)
Commit message (
Expand
)
Author
Age
Files
Lines
*
clk: tegra: Mark fuse clock as critical
Stephen Warren
2020-01-08
1
-1
/
+5
*
clk: tegra: Move SOR0 implementation to Tegra124
Thierry Reding
2019-11-11
1
-8
/
+0
*
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201
Thomas Gleixner
2019-05-30
1
-12
/
+1
*
clk: tegra: get rid of duplicate defines
Marcel Ziswiler
2018-12-14
1
-3
/
+0
*
clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks
Peter De-Schrijver
2018-07-25
1
-11
/
+0
*
clk: tegra: Mark HCLK, SCLK and EMC as critical
Dmitry Osipenko
2018-03-12
1
-1
/
+1
*
clk: tegra: Correct parent of the APBDMA clock
Dmitry Osipenko
2017-11-01
1
-1
/
+1
*
clk: tegra: Add AHB DMA clock entry
Dmitry Osipenko
2017-11-01
1
-0
/
+1
*
clk: tegra: Fix sor1_out clock implementation
Thierry Reding
2017-10-19
1
-16
/
+0
*
clk: tegra: Use tegra_clk_register_periph_data()
Thierry Reding
2017-10-19
1
-4
/
+1
*
clk: tegra: Add TEGRA_PERIPH_ON_APB flag to I2C
Alex Frid
2017-08-24
1
-1
/
+2
*
clk: tegra: Add missing Tegra210 clocks
Peter De Schrijver
2017-04-04
1
-0
/
+6
*
clk: tegra: Define Tegra210 DMIC clocks
Peter De Schrijver
2017-03-20
1
-0
/
+21
*
clk: tegra: Add CEC clock
Peter De Schrijver
2017-03-20
1
-0
/
+1
*
clk: tegra: Correct afi clock parent
Peter De Schrijver
2017-03-20
1
-1
/
+1
*
clk: tegra: Fix ISP clock modelling
Peter De Schrijver
2017-03-20
1
-2
/
+9
*
clk: tegra: Mark timer clock as critical
Thierry Reding
2016-06-22
1
-1
/
+1
*
clk: tegra: Squash sor1 safe/brick/src into a single mux
Thierry Reding
2016-06-17
1
-11
/
+12
*
clk: tegra: dpaux and dpaux1 are fixed factor clocks
Thierry Reding
2016-04-28
1
-2
/
+0
*
clk: tegra: Add dpaux1 clock
Thierry Reding
2016-04-28
1
-0
/
+1
*
clk: tegra: Use correct parent for dpaux clock
Thierry Reding
2016-04-28
1
-1
/
+1
*
clk: tegra: Special-case mipi-cal parent on Tegra114
Thierry Reding
2016-04-28
1
-1
/
+1
*
clk: tegra: Constify peripheral clock registers
Thierry Reding
2016-04-28
1
-1
/
+1
*
clk: tegra: Add the APB2APE audio clock on Tegra210
Jon Hunter
2016-02-02
1
-0
/
+1
*
clk: tegra: Fix the misnaming of nvenc from msenc
Rhyland Klein
2016-02-02
1
-1
/
+1
*
clk: tegra: Fix divider on VI_I2C
Rhyland Klein
2016-01-25
1
-1
/
+1
*
clk: tegra: periph: Add new periph clks and muxes for Tegra210
Rhyland Klein
2015-11-20
1
-4
/
+367
*
clk: tegra: Properly include clk.h
Stephen Boyd
2015-07-20
1
-1
/
+0
*
clk: tegra: Fix a bunch of sparse warnings
Thierry Reding
2015-04-10
1
-1
/
+1
*
clk: tegra: Define PLLD_DSI and remove dsia(b)_mux
Mark Zhang
2015-02-02
1
-2
/
+0
*
clk: tegra: SDMMC controllers are on APB
Andrew Bresticker
2015-02-02
1
-8
/
+8
*
clk: tegra: fix vi_sensor clocks on Tegra124
Peter De Schrijver
2014-06-25
1
-2
/
+2
*
clk: tegra: Fix xusb_hs_src clock hierarchy
Andrew Bresticker
2014-05-23
1
-0
/
+6
*
clk: tegra: Fix xusb_fs_src mux
Jim Lin
2014-05-23
1
-1
/
+3
*
clk: tegra: Fix vic03 mux index
Peter De Schrijver
2014-02-20
1
-3
/
+1
*
clk: tegra: fix sdmmc clks on Tegra1x4
Andrew Bresticker
2014-02-17
1
-0
/
+4
*
clk: tegra: Correct clock number for UARTE
Thierry Reding
2014-02-17
1
-1
/
+1
*
clk: tegra124: Add new peripheral clocks
Peter De Schrijver
2013-11-26
1
-0
/
+69
*
clk: tegra: add TEGRA_PERIPH_NO_GATE
Peter De Schrijver
2013-11-26
1
-0
/
+6
*
clk: tegra: add locking to periph clks
Peter De Schrijver
2013-11-26
1
-15
/
+18
*
clk: tegra: move periph clocks to common file
Peter De Schrijver
2013-11-26
1
-0
/
+596