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path: root/drivers/clk/tegra/clk-tegra114.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* clk: tegra: Make vde a child of pll_p on tegra114Dmitry Osipenko2021-12-151-1/+1
* clk: tegra: Remove audio clocks configuration from clock driverSowjanya Komatineni2020-03-121-3/+2
* clk: tegra: Remove tegra_pmc_clk_init along with clk idsSowjanya Komatineni2020-03-121-14/+3
* clk: tegra: Remove CLK_M_DIV fixed clocksSowjanya Komatineni2020-03-121-15/+0
* clk: tegra: Add Tegra OSC to clock lookupSowjanya Komatineni2020-03-121-0/+2
* clk: tegra: Add support for OSC_DIV fixed clocksSowjanya Komatineni2020-03-121-0/+4
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201Thomas Gleixner2019-05-301-12/+1
* clk: tegra: Fix maximum audio sync clock for Tegra124/210Jon Hunter2018-12-141-1/+8
* clk: tegra: Add quirk for getting CDEV1/2 clocks on Tegra20Dmitry Osipenko2018-05-181-1/+1
* clk: tegra: Specify VDE clock rateDmitry Osipenko2018-03-121-0/+1
* clk: tegra: Mark HCLK, SCLK and EMC as criticalDmitry Osipenko2018-03-121-2/+1
* clk: tegra: Use tegra_clk_register_periph_data()Thierry Reding2017-10-191-3/+1
* clk: tegra: Add CEC clockPeter De Schrijver2017-03-201-0/+1
* clk: tegra: remove TEGRA_PLL_USE_LOCK for PLLD/PLLD2Vince Hsu2016-08-241-2/+2
* clk: tegra: Initialize UTMI PLL when enabling PLLUAndrew Bresticker2016-06-301-154/+2
* clk: tegra: Special-case mipi-cal parent on Tegra114Thierry Reding2016-04-281-1/+5
* clk: tegra: Remove CLK_IS_ROOTStephen Boyd2016-03-031-2/+1
* clk: tegra: pll: Update PLLM handlingDanny Huang2015-11-201-1/+2
* clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rateRhyland Klein2015-11-201-51/+71
* clk: tegra: pll: Don't unconditionally set LOCK flagsRhyland Klein2015-11-201-10/+13
* clk: tegra: Constify pdiv-to-hw mappingsThierry Reding2015-11-201-4/+4
* clk: tegra: Format tables consistentlyThierry Reding2015-11-181-136/+137
* clk: tegra: Miscellaneous coding style cleanupsThierry Reding2015-11-181-6/+6
* clk: tegra: Fix 26 MHz oscillator frequencyThierry Reding2015-11-181-1/+1
* clk: tegra: Modify tegra_audio_clk_init to accept more pllsRhyland Klein2015-10-201-1/+7
* clk: tegra: Properly include clk.hStephen Boyd2015-07-201-2/+0
* clk: tegra: Use generic tegra_osc_clk_init() on Tegra114Thierry Reding2015-04-101-31/+3
* clk: tegra: Various whitespace cleanupsThierry Reding2015-04-101-1/+1
* clk: tegra: Define PLLD_DSI and remove dsia(b)_muxMark Zhang2015-02-021-2/+8
* clk: tegra: Implement memory-controller clockThierry Reding2014-11-261-1/+6
* clk: tegra: fix vi_sensor clocks on Tegra124Peter De Schrijver2014-06-251-1/+30
* clk: tegra: Initialize xusb clocksAndrew Bresticker2014-05-231-1/+6
* clk: tegra: Fix xusb_hs_src clock hierarchyAndrew Bresticker2014-05-231-10/+5
* clk: tegra: fix sdmmc clks on Tegra1x4Andrew Bresticker2014-02-171-4/+4
* clk: tegra: implement a reset driverStephen Warren2013-12-121-1/+2
* clk: tegra: Initialize DSI low-power clocksThierry Reding2013-11-261-0/+2
* clk: tegra: add FUSE clock deviceAlexandre Courbot2013-11-261-0/+1
* clk: tegra114: Initialize clocks needed for HDMIMikko Perttunen2013-11-261-0/+2
* clk: tegra: introduce common gen4 super clockPeter De Schrijver2013-11-261-74/+2
* clk: tegra: move PMC, fixed clocks to common filesPeter De Schrijver2013-11-261-74/+1
* clk: tegra: move periph clocks to common filePeter De Schrijver2013-11-261-574/+17
* clk: tegra: move audio clk to common filePeter De Schrijver2013-11-261-208/+182
* clk: tegra: add clkdev registration infraPeter De Schrijver2013-11-261-159/+163
* clk: tegra: move fields to tegra_clk_pll_paramsPeter De Schrijver2013-11-261-31/+43
* clk: tegra: use pll_ref as the pll_e parentPeter De Schrijver2013-11-261-1/+2
* clk: tegra: move some PLLC and PLLXC init to clk-pll.cPeter De Schrijver2013-11-261-89/+20
* clk: tegra: common periph_clk_enb_refcnt and clksPeter De Schrijver2013-11-261-41/+16
* clk: tegra: simplify periph clock dataPeter De Schrijver2013-11-261-235/+141
* clk: tegra114: Rename gr_2d/gr_3d to gr2d/gr3dThierry Reding2013-11-261-4/+4
* clk: tegra: Set the clk parent of host1x to pll_pAndrew Chew2013-11-261-0/+1