summaryrefslogtreecommitdiffstats
path: root/drivers/clk/tegra/clk-tegra114.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* clk: tegra: Implement memory-controller clockThierry Reding2014-11-261-1/+6
* clk: tegra: fix vi_sensor clocks on Tegra124Peter De Schrijver2014-06-251-1/+30
* clk: tegra: Initialize xusb clocksAndrew Bresticker2014-05-231-1/+6
* clk: tegra: Fix xusb_hs_src clock hierarchyAndrew Bresticker2014-05-231-10/+5
* clk: tegra: fix sdmmc clks on Tegra1x4Andrew Bresticker2014-02-171-4/+4
* clk: tegra: implement a reset driverStephen Warren2013-12-121-1/+2
* clk: tegra: Initialize DSI low-power clocksThierry Reding2013-11-261-0/+2
* clk: tegra: add FUSE clock deviceAlexandre Courbot2013-11-261-0/+1
* clk: tegra114: Initialize clocks needed for HDMIMikko Perttunen2013-11-261-0/+2
* clk: tegra: introduce common gen4 super clockPeter De Schrijver2013-11-261-74/+2
* clk: tegra: move PMC, fixed clocks to common filesPeter De Schrijver2013-11-261-74/+1
* clk: tegra: move periph clocks to common filePeter De Schrijver2013-11-261-574/+17
* clk: tegra: move audio clk to common filePeter De Schrijver2013-11-261-208/+182
* clk: tegra: add clkdev registration infraPeter De Schrijver2013-11-261-159/+163
* clk: tegra: move fields to tegra_clk_pll_paramsPeter De Schrijver2013-11-261-31/+43
* clk: tegra: use pll_ref as the pll_e parentPeter De Schrijver2013-11-261-1/+2
* clk: tegra: move some PLLC and PLLXC init to clk-pll.cPeter De Schrijver2013-11-261-89/+20
* clk: tegra: common periph_clk_enb_refcnt and clksPeter De Schrijver2013-11-261-41/+16
* clk: tegra: simplify periph clock dataPeter De Schrijver2013-11-261-235/+141
* clk: tegra114: Rename gr_2d/gr_3d to gr2d/gr3dThierry Reding2013-11-261-4/+4
* clk: tegra: Set the clk parent of host1x to pll_pAndrew Chew2013-11-261-0/+1
* clk: tegra: add TEGRA_DIVIDER_ROUND_UP for periph clksPeter De Schrijver2013-11-261-24/+29
* clk: tegra: Set the clock parent of gr2d/gr3d to pll_c2Mark Zhang2013-11-251-0/+3
* clk: tegra: Fix vde/2d/3d clock src offsetMark Zhang2013-11-251-10/+3
* clk: tegra: Correct sbc mux width & parentMark Zhang2013-11-251-6/+6
* clk: tegra: replace enum tegra114_clk by binding headerPeter De Schrijver2013-11-251-233/+198
* Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds2013-09-101-13/+25
|\
| * clk: add CLK_SET_RATE_NO_REPARENT flagJames Hogan2013-08-191-12/+24
| * clk: tegra114: Fix incorrect placement of __initdataSachin Kamat2013-08-091-1/+1
* | clk: tegra114: add LP1 suspend/resume supportJoseph Lo2013-08-121-0/+12
* | clk: tegra: add suspend/resume function for tegra_cpu_car_opsJoseph Lo2013-07-191-0/+26
|/
* Merge tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds2013-07-031-7/+263
|\
| * clk: tegra: T114: add DFLL DVCO reset controlPaul Walmsley2013-06-181-0/+37
| * clk: tegra: T114: add DFLL source clocksPaul Walmsley2013-06-181-0/+11
| * clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLLPaul Walmsley2013-06-181-0/+118
| * clk: tegra: override bits for Tegra114 PLLMPeter De Schrijver2013-06-121-0/+9
| * clk: tegra: fix sclk_parentsPeter De Schrijver2013-06-121-1/+1
| * clk: tegra: PLL m,n,p init for Tegra114Peter De Schrijver2013-06-121-0/+77
| * clk: tegra: pllp_out2 divider is int onlyPeter De Schrijver2013-06-121-2/+2
| * clk: tegra114: Fix msenc clock registerMikko Perttunen2013-06-051-1/+1
| * clk: tegra: Use common of_clk_init functionPrashant Gaikwad2013-05-311-1/+2
| * clk: tegra114: correctly output clk_32kAlexandre Courbot2013-05-311-0/+3
| * clk: tegra: fix clk_out parents listPrashant Gaikwad2013-05-311-2/+2
* | clk: tegra114: implement wait_for_reset and disable_clock for tegra_cpu_car_opsJoseph Lo2013-05-221-1/+22
|/
* clk: tegra: fix enum tegra114_clk to match bindingStephen Warren2013-04-051-1/+1
* clk: tegra: Remove forced clk_enable of uartdPeter De Schrijver2013-04-051-1/+1
* clk: tegra: Implement clocks for Tegra114Peter De Schrijver2013-04-051-0/+2085
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 23:43:51 +0100